Microchip Technology TDGL019 Data Sheet
© 2011-2014 Microchip Technology Inc.
DS60001168F-page 289
PIC32MX1XX/2XX
TABLE 30-3:
DC CHARACTERISTICS: IDLE CURRENT (I
IDLE
)
DC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
≤ T
A
≤ +85°C for Industrial
Parameter
No.
Typical
(2)
Max.
Units
Conditions
Idle Current (I
IDLE
): Core Off, Clock on Base Current (Note 1)
MDC34a
8
13
mA
50 MHz
Note 1:
The test conditions for I
IDLE
current measurements are as follows:
• Oscillator mode is EC (for 8 MHz and below) and EC+PLL (for above 8 MHz) with OSC1 driven by
external square wave from rail-to-rail, (OSC1 input clock input over/undershoot < 100 mV required)
• OSC2/CLKO is configured as an I/O input pin
• USB PLL oscillator is disabled if the USB module is implemented, PBCLK divisor = 1:8
• CPU is in Idle mode (CPU core Halted), and SRAM data memory Wait states = 1
• No peripheral modules are operating, (ON bit = 0), but the associated PMD bit is cleared
• WDT, Clock Switching, Fail-Safe Clock Monitor, and Secondary Oscillator are disabled
• All I/O pins are configured as inputs and pulled to V
• USB PLL oscillator is disabled if the USB module is implemented, PBCLK divisor = 1:8
• CPU is in Idle mode (CPU core Halted), and SRAM data memory Wait states = 1
• No peripheral modules are operating, (ON bit = 0), but the associated PMD bit is cleared
• WDT, Clock Switching, Fail-Safe Clock Monitor, and Secondary Oscillator are disabled
• All I/O pins are configured as inputs and pulled to V
SS
• MCLR = V
DD
• RTCC and JTAG are disabled
2:
Data in the “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance
only and are not tested.
only and are not tested.
TABLE 30-4:
DC CHARACTERISTICS: POWER-DOWN CURRENT (I
PD
)
DC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V (unless otherwise stated)
Operating temperature
Operating temperature
-40°C
≤ T
A
≤ +85°C for Industrial
Param.
No.
Typical
(2)
Max.
Units
Conditions
Power-Down Current (I
PD
) (Note 1)
MDC40k
10
25
μA
-40°C
Base Power-Down Current
MDC40n
250
500
μA
+85°C
Module Differential Current
MDC41e
MDC41e
10
55
μA
3.6V
Watchdog Timer Current:
ΔI
WDT
(Note 3)
MDC42e
23
55
μA
3.6V
RTCC + Timer1 w/32 kHz Crystal:
ΔI
RTCC
(Note 3)
MDC43d
1100
1300
μA
3.6V
ADC:
ΔI
ADC
(Notes 3,4)
Note 1:
The test conditions for I
PD
current measurements are as follows:
• Oscillator mode is EC (for 8 MHz and below) and EC+PLL (for above 8 MHz) with OSC1 driven by
external square wave from rail-to-rail, (OSC1 input clock input over/undershoot < 100 mV required)
• OSC2/CLKO is configured as an I/O input pin
• USB PLL oscillator is disabled if the USB module is implemented, PBCLK divisor = 1:8
• CPU is in Sleep mode, and SRAM data memory Wait states = 1
• No peripheral modules are operating, (ON bit = 0), but the associated PMD bit is set
• WDT, Clock Switching, Fail-Safe Clock Monitor, and Secondary Oscillator are disabled
• All I/O pins are configured as inputs and pulled to V
• USB PLL oscillator is disabled if the USB module is implemented, PBCLK divisor = 1:8
• CPU is in Sleep mode, and SRAM data memory Wait states = 1
• No peripheral modules are operating, (ON bit = 0), but the associated PMD bit is set
• WDT, Clock Switching, Fail-Safe Clock Monitor, and Secondary Oscillator are disabled
• All I/O pins are configured as inputs and pulled to V
SS
• MCLR = V
DD
• RTCC and JTAG are disabled
2:
Data in the “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance
only and are not tested.
only and are not tested.
3:
The
Δ current is the additional current consumed when the module is enabled. This current should be
added to the base I
PD
current.
4:
Test conditions for ADC module differential current are as follows: Internal ADC RC oscillator enabled.