Microchip Technology TDGL019 Data Sheet

2011

-2014 Microchip

Technology In

DS6000116

8F-p

age

PIC32MX1XX/2XX

TABLE 4-6:

I2C1 AND I2C2 REGISTER MAP

irtual A

ddress

(BF80_#

)

Regis

ter

Name

(1)

Bit Range

Bits

All

set

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

5000 I2C1CON

31:16

—

0000

15:0

—

SIDL

SCLREL

STRICT

A10M

DISSLW

SMEN

GCEN

STREN

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

1000

5010 I2C1STAT

31:16

—

0000

15:0 ACKSTAT TRSTAT

—

BCL

GCSTAT

ADD10

IWCOL

I2COV

D_A

R_W

RBF

TBF

0000

5020 I2C1ADD

31:16

—

0000

15:0

—

Address Register

0000

5030 I2C1MSK

31:16

—

0000

15:0

—

Address Mask Register

0000

5040 I2C1BRG

31:16

—

0000

15:0

—

Baud Rate Generator Register

0000

5050 I2C1TRN

31:16

—

0000

15:0

—

Transmit Register

0000

5060 I2C1RCV

31:16

—

0000

15:0

—

Receive Register

0000

5100 I2C2CON

31:16

—

0000

15:0

—

SIDL

SCLREL

STRICT

A10M

DISSLW

SMEN

GCEN

STREN

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

1000

5110 I2C2STAT

31:16

—

0000

15:0 ACKSTAT TRSTAT

—

BCL

GCSTAT

ADD10

IWCOL

I2COV

D_A

R_W

RBF

TBF

0000

5120 I2C2ADD

31:16

—

0000

15:0

—

Address Register

0000

5130 I2C2MSK

31:16

—

0000

15:0

—

Address Mask Register

0000

5140 I2C2BRG

31:16

—

0000

15:0

—

Baud Rate Generator Register

0000

5150 I2C2TRN

31:16

—

0000

15:0

—

Transmit Register

0000

5160 I2C2RCV

31:16

—

0000

15:0

—

Receive Register

0000

Legend:

= unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

All registers in this table except I2CxRCV have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See

Section 11.2 “CLR, SET and INV

Registers”

for more information.