Microchip Technology MA330028 Data Sheet

Page of 530
 2011-2
013 M
ic
rochip 
T
e
chnology 
In
c.
D
S
70000657H
-page 
107
dsPI
C3
3E
PXX
XGP5
0X
, dsP
IC
3
3
EPX
XXM
C
2
0
X
/5
0X
 A
N
D
 P
IC
2
4
EPX
XXG
P/M
C
20
X
EXAMPLE 4-3:
PAGED DATA MEMORY SPACE
0x0000
Program Memory
0x0000
0x7FFF
0x7FFF
EDS Page 0x001
0x0000
SFR Registers
0x0FFF
0x1000
Up to 8-Kbyte
0x2FFF
Local Data Space
EDS
(DSRPAG<9:0>/DSWPAG<8:0>)
Reserved
(Will produce an
address error trap)
32-Kbyte
EDS Window
0xFFFF
0x3000
Page 0
Program Space
0x00_0000
0x7F_FFFF
(lsw – <15:0>)
0x0000
(DSRPAG = 0x001)
(DSWPAG = 0x001)
EDS Page 0x1FF
(DSRPAG = 0x1FF)
(DSWPAG = 0x1FF)
EDS Page 0x200
(DSRPAG = 0x200)
PSV
Program
Memory
EDS Page 0x2FF
(DSRPAG = 0x2FF)
EDS Page 0x300
(DSRPAG = 0x300)
EDS Page 0x3FF
(DSRPAG = 0x3FF)
0x7FFF
0x0000
0x7FFF
0x0000
0x7FFF
0x0000
0x7FFF
0x0000
0x7FFF
DS_Addr<14:0>
DS_Addr<15:0>
(lsw)
PSV
Program
Memory
(MSB)
Table Address Space
(TBLPAG<7:0>)
Program Memory
0x00_0000
0x7F_FFFF
(MSB – <23:16>)
0x0000
(TBLPAG = 0x00)
0xFFFF
DS_Addr<15:0>
lsw Using
TBLRDL/TBLWTL
MSB Using
TBLRDH/TBLWTH
0x0000
(TBLPAG = 0x7F)
0xFFFF
lsw Using
TBLRDL/TBLWTL
MSB Using
TBLRDH/TBLWTH
(Instruction & Data)
No writes allowed
No writes allowed
No writes allowed
No writes allowed
RAM
(1)
0x7FFF
0x8000
Note
1:
For 64K Flash devices. RAM size and end location is dependent on device; see 
 for more information.