Microchip Technology MA330028 Data Sheet
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 148
2011-2013 Microchip Technology Inc.
REGISTER 8-11:
DMAPWC: DMA PERIPHERAL WRITE COLLISION STATUS REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
U-0
R-0
R-0
R-0
R-0
—
—
—
—
PWCOL3
PWCOL2
PWCOL1
PWCOL0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-4
Unimplemented:
Read as ‘0’
bit 3
PWCOL3:
DMA Channel 3 Peripheral Write Collision Flag bit
1
= Write collision is detected
0
= No write collision is detected
bit 2
PWCOL2:
DMA Channel 2 Peripheral Write Collision Flag bit
1
= Write collision is detected
0
= No write collision is detected
bit 1
PWCOL1:
DMA Channel 1 Peripheral Write Collision Flag bit
1
= Write collision is detected
0
= No write collision is detected
bit 0
PWCOL0:
DMA Channel 0 Peripheral Write Collision Flag bit
1
= Write collision is detected
0
= No write collision is detected