Microchip Technology MA330028 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 27
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
U2CTS
U2RTS
U2RX
U2TX
BCLK2
U2RTS
U2RX
U2TX
BCLK2
I
O
I
O
O
O
ST
—
ST
—
ST
No
No
No
Yes
Yes
Yes
No
UART2 Clear-To-Send.
UART2 Ready-To-Send.
UART2 receive.
UART2 transmit.
UART2 IrDA
UART2 Ready-To-Send.
UART2 receive.
UART2 transmit.
UART2 IrDA
®
baud clock output.
SCK1
SDI1
SDO1
SS1
SDI1
SDO1
SS1
I/O
I
O
I/O
ST
ST
ST
—
ST
No
No
No
No
No
No
No
Synchronous serial clock input/output for SPI1.
SPI1 data in.
SPI1 data out.
SPI1 slave synchronization or frame pulse I/O.
SPI1 data in.
SPI1 data out.
SPI1 slave synchronization or frame pulse I/O.
SCK2
SDI2
SDO2
SS2
SDI2
SDO2
SS2
I/O
I
O
I/O
ST
ST
ST
—
ST
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Synchronous serial clock input/output for SPI2.
SPI2 data in.
SPI2 data out.
SPI2 slave synchronization or frame pulse I/O.
SPI2 data in.
SPI2 data out.
SPI2 slave synchronization or frame pulse I/O.
SCL1
SDA1
ASCL1
ASDA1
SDA1
ASCL1
ASDA1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
ST
ST
ST
ST
ST
ST
ST
No
No
No
No
No
No
No
Synchronous serial clock input/output for I2C1.
Synchronous serial data input/output for I2C1.
Alternate synchronous serial clock input/output for I2C1.
Alternate synchronous serial data input/output for I2C1.
Synchronous serial data input/output for I2C1.
Alternate synchronous serial clock input/output for I2C1.
Alternate synchronous serial data input/output for I2C1.
SCL2
SDA2
ASCL2
ASDA2
SDA2
ASCL2
ASDA2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
ST
ST
ST
ST
ST
ST
ST
No
No
No
No
No
No
No
Synchronous serial clock input/output for I2C2.
Synchronous serial data input/output for I2C2.
Alternate synchronous serial clock input/output for I2C2.
Alternate synchronous serial data input/output for I2C2.
Synchronous serial data input/output for I2C2.
Alternate synchronous serial clock input/output for I2C2.
Alternate synchronous serial data input/output for I2C2.
TMS
(
)
TCK
TDI
TDO
TDI
TDO
I
I
I
I
I
O
ST
ST
ST
ST
ST
—
No
No
No
No
No
No
No
JTAG Test mode select pin.
JTAG test clock input pin.
JTAG test data input pin.
JTAG test data output pin.
JTAG test clock input pin.
JTAG test data input pin.
JTAG test data output pin.
C1RX
(
)
C1TX
I
O
ST
—
Yes
Yes
Yes
ECAN1 bus receive pin.
ECAN1 bus transmit pin.
ECAN1 bus transmit pin.
FLT1
(
)
, FLT2
(
)
FLT3
(
)
, FLT4
(
)
FLT32
,
)
DTCMP1-DTCMP3
)
PWM1L-PWM3L
(
)
PWM1H-PWM3H
(
)
SYNCI1
SYNCO1
(
)
I
I
I
I
I
I
I
O
O
O
I
O
ST
ST
ST
ST
ST
ST
ST
—
—
—
ST
—
Yes
No
No
No
Yes
No
No
No
Yes
Yes
Yes
PWM Fault Inputs 1 and 2.
PWM Fault Inputs 3 and 4.
PWM Fault Input 32 (Class B Fault).
PWM Dead-Time Compensation Inputs 1 through 3.
PWM Low Outputs 1 through 3.
PWM High Outputs 1 through 3.
PWM Synchronization Input 1.
PWM Synchronization Output 1.
PWM Fault Inputs 3 and 4.
PWM Fault Input 32 (Class B Fault).
PWM Dead-Time Compensation Inputs 1 through 3.
PWM Low Outputs 1 through 3.
PWM High Outputs 1 through 3.
PWM Synchronization Input 1.
PWM Synchronization Output 1.
INDX1
(
)
HOME1
(
)
QEA1
(
)
QEB1
(
)
CNTCMP1
I
I
I
I
I
I
O
ST
ST
ST
ST
ST
ST
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Quadrature Encoder Index1 pulse input.
Quadrature Encoder Home1 pulse input.
Quadrature Encoder Phase A input in QEI1 mode. Auxiliary timer
external clock/gate input in Timer mode.
Quadrature Encoder Phase B input in QEI1 mode. Auxiliary timer
external clock/gate input in Timer mode.
Quadrature Encoder Compare Output 1.
Quadrature Encoder Home1 pulse input.
Quadrature Encoder Phase A input in QEI1 mode. Auxiliary timer
external clock/gate input in Timer mode.
Quadrature Encoder Phase B input in QEI1 mode. Auxiliary timer
external clock/gate input in Timer mode.
Quadrature Encoder Compare Output 1.
TABLE 1-1:
PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
(
4
)
Pin
Type
Buffer
Type
PPS
Description
Legend:
CMOS = CMOS compatible input or output
Analog = Analog input
P = Power
ST = Schmitt Trigger input with CMOS levels
O = Output
I = Input
PPS = Peripheral Pin Select
TTL = TTL input buffer
Note 1:
This pin is available on dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X devices only.
2:
This pin is available on dsPIC33EPXXXGP/MC50X devices only.
3:
This is the default Fault on Reset for dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X devices. See
Section 16.0 “High-Speed PWM Module (dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X
Devices Only)”
Devices Only)”
for more information.
4:
Not all pins are available in all packages variants. See the
“Pin Diagrams”
section for pin availability.
5:
There is an internal pull-up resistor connected to the TMS pin when the JTAG interface is active. See the
JTAGEN bit field in
JTAGEN bit field in
Table 27-2
.