Microchip Technology MA330028 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 271
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
bit 4-2
SPRE<2:0>:
Secondary Prescale bits (Master mode)
(
111
= Secondary prescale 1:1
110
= Secondary prescale 2:1
•
•
•
000
•
•
000
= Secondary prescale 8:1
bit 1-0
PPRE<1:0>:
Primary Prescale bits (Master mode)
(
)
11
= Primary prescale 1:1
10
= Primary prescale 4:1
01
= Primary prescale 16:1
00
= Primary prescale 64:1
REGISTER 18-2:
SPI
X
CON1: SPI
X
CONTROL REGISTER 1 (CONTINUED)
Note 1:
The CKE bit is not used in Framed SPI modes. Program this bit to ‘0’ for Framed SPI modes (FRMEN = 1).
2:
This bit must be cleared when FRMEN = 1.
3:
Do not set both primary and secondary prescalers to the value of 1:1.