Microchip Technology MA330028 Data Sheet

Page of 530
 2011-2013 Microchip Technology Inc.
DS70000657H-page 373
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
26.0
PROGRAMMABLE CYCLIC 
REDUNDANCY CHECK (CRC) 
GENERATOR
The programmable CRC generator offers the following
features:
• User-programmable (up to 32nd order) 
polynomial CRC equation
• Interrupt output
• Data FIFO
The programmable CRC generator provides a
hardware implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-programmable CRC polynomial equation, 
up to 32 bits
• Programmable shift direction (little or big-endian)
• Independent data and polynomial lengths
• Configurable interrupt output
• Data FIFO
A simplified block diagram of the CRC generator is
shown in 
. A simple version of the CRC shift
engine is shown in 
FIGURE 26-1:
CRC BLOCK DIAGRAM
Note 1:
This data sheet summarizes the
features of the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X families of
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
“Programmable Cyclic Redundancy
Check (CRC)”
 (DS70346) of the
dsPIC33/PIC24 Family Reference Man-
ual
”, which is available from the Microchip
www.microchip.com
).
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
 in
this data sheet for device-specific register
and bit information.
Variable FIFO
(4x32, 8x16 or 16x8)
CRCDATH
CRCDATL
Shift Buffer
CRC Shift Engine
CRCWDATH
CRCWDATL
LENDIAN
1
0
CRCISEL
1
0
FIFO Empty Event 
Shift Complete Event
Set CRCIF
2 * F
P
 Shift Clock