Microchip Technology MA330028 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 513
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
Revision E (April 2012)
This revision includes typographical and formatting
changes throughout the data sheet text.
All other major changes are referenced by their
respective section in
changes throughout the data sheet text.
All other major changes are referenced by their
respective section in
TABLE A-4:
MAJOR SECTION UPDATES
Section Name
Update Description
“16-bit Microcontrollers
and Digital Signal
Controllers (up to
512-Kbyte Flash and
48-Kbyte SRAM) with High-
Speed PWM, Op amps, and
Advanced Analog”
and Digital Signal
Controllers (up to
512-Kbyte Flash and
48-Kbyte SRAM) with High-
Speed PWM, Op amps, and
Advanced Analog”
The following 512-Kbyte devices were added to the General Purpose Families table
(see Table 1):
• PIC24EP512GP202
• PIC24EP512GP204
• PIC24EP512GP206
• dsPIC33EP512GP502
• dsPIC33EP512GP504
• dsPIC33EP512GP506
The following 512-Kbyte devices were added to the Motor Control Families table (see
Table 2):
• PIC24EP512MC202
• PIC24EP512MC204
• PIC24EP512MC206
• dsPIC33EP512MC202
• dsPIC33EP512MC204
• dsPIC33EP512MC206
• dsPIC33EP512MC502
• dsPIC33EP512MC504
• dsPIC33EP512MC506
Certain Pin Diagrams were updated to include the new 512-Kbyte devices.
(see Table 1):
• PIC24EP512GP202
• PIC24EP512GP204
• PIC24EP512GP206
• dsPIC33EP512GP502
• dsPIC33EP512GP504
• dsPIC33EP512GP506
The following 512-Kbyte devices were added to the Motor Control Families table (see
Table 2):
• PIC24EP512MC202
• PIC24EP512MC204
• PIC24EP512MC206
• dsPIC33EP512MC202
• dsPIC33EP512MC204
• dsPIC33EP512MC206
• dsPIC33EP512MC502
• dsPIC33EP512MC504
• dsPIC33EP512MC506
Certain Pin Diagrams were updated to include the new 512-Kbyte devices.
Section 4.0 “Memory
Organization”
Organization”
Added a Program Memory Map for the new 512-Kbyte devices (see Figure 4-4).
Added a Data Memory Map for the new dsPIC 512-Kbyte devices (see Figure 4-11).
Added a Data Memory Map for the new PIC24 512-Kbyte devices (see Figure 4-16).
Added a Data Memory Map for the new dsPIC 512-Kbyte devices (see Figure 4-11).
Added a Data Memory Map for the new PIC24 512-Kbyte devices (see Figure 4-16).
Section 7.0 “Interrupt
Controller”
Controller”
Updated the VECNUM bits in the INTTREG register (see Register 7-7).
Section 11.0 “I/O Ports”
Added tip 6 to Section 11.5 “I/O Helpful Tips”.
Section 27.0 “Special
Features”
Features”
The following modifications were made to the Configuration Byte Register Map (see
Table 27-1):
• Added the column Device Memory Size (Kbytes)
• Removed Notes 1 through 4
• Added addresses for the new 512-Kbyte devices
Table 27-1):
• Added the column Device Memory Size (Kbytes)
• Removed Notes 1 through 4
• Added addresses for the new 512-Kbyte devices
Section 30.0 “Electrical
Characteristics”
Characteristics”
Updated the Minimum value for Parameter DC10 (see Table 30-4).
Added Power-Down Current (Ipd) parameters for the new 512-Kbyte devices (see
Table 30-8).
Updated the Minimum value for Parameter CM34 (see
Added Power-Down Current (Ipd) parameters for the new 512-Kbyte devices (see
Table 30-8).
Updated the Minimum value for Parameter CM34 (see
).
Updated the Minimum and Maximum values and the Conditions for paramteer SY12
(see Table 30-22).
(see Table 30-22).