Microchip Technology MCP1631RD-MCC2 Data Sheet
2006-2012 Microchip Technology Inc.
DS41291G-page 29
PIC16F882/883/884/886/887
TABLE 2-2:
PIC16F882/883/884/886/887
SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other Resets
Bank 1
80h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
xxxx xxxx
81h
OPTION_REG
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
1111 1111
82h
PCL
Program Counter’s (PC) Least Significant Byte
0000 0000
0000 0000
83h
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx
000q quuu
(5)
84h
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
uuuu uuuu
85h
TRISA
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
1111 1111
1111 1111
86h
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
1111 1111
1111 1111
87h
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
1111 1111
1111 1111
88h
TRISD
(3)
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
1111 1111
1111 1111
89h
TRISE
—
—
—
—
TRISE3
TRISE2
(3)
TRISE1
(3)
TRISE0
(3)
---- 1111
---- 1111
8Ah
PCLATH
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
---0 0000
8Bh
INTCON
GIE PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
(1)
0000 000x
0000 000u
8Ch
PIE1
—
ADIE
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
-000 0000
0000 0000
8Dh
PIE2
OSFIE
C2IE
C1IE
EEIE
BCLIE
ULPWUIE
—
CCP2IE
0000 00-0
0000 0000
8Eh
PCON
—
—
ULPWUE
SBOREN
—
—
POR
BOR
--01 --qq
--0u --uu
(4,6)
8Fh
OSCCON
—
IRCF2
IRCF1
IRCF0
OSTS
HTS
LTS
SCS
-110 q000
-110 q000
90h
OSCTUNE
—
—
—
TUN4
TUN3
TUN2
TUN1
TUN0
---0 0000
---u uuuu
91h
SSPCON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
0000 0000
0000 0000
92h
PR2
Timer2 Period Register
1111 1111
1111 1111
93h
SSPADD
(2)
Synchronous Serial Port (I
2
C mode) Address Register
0000 0000
0000 0000
93h
SSPMSK
(2)
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
1111 1111
1111 1111
94h
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
0000 0000
0000 0000
95h
WPUB
WPUB7
WPUB6
WPUB5
WPUB4
WPUB3
WPUB2
WPUB1
WPUB0
1111 1111
1111 1111
96h
IOCB
IOCB7
IOCB6
IOCB5
IOCB4
IOCB3
IOCB2
IOCB1
IOCB0
0000 0000
0000 0000
97h
VRCON
VREN
VROE
VRR
VRSS
VR3
VR2
VR1
VR0
0000 0000
0000 0000
98h
TXSTA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
0000 0010
0000 -010
99h
SPBRG
BRG7
BRG6
BRG5
BRG4
BRG3
BRG2
BRG1
BRG0
0000 0000
0000 0000
9Ah
SPBRGH
BRG15
BRG14
BRG13
BRG12
BRG11
BRG10
BRG9
BRG8
0000 0000
0000 0000
9Bh
PWM1CON
PRSEN
PDC6
PDC5
PDC4
PDC3
PDC2
PDC1
PDC0
0000 0000
0000 0000
9Ch
ECCPAS
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0
PSSAC1
PSSAC0
PSSBD1
PSSBD0
0000 0000
0000 0000
9Dh
PSTRCON
—
—
—
STRSYNC
STRD
STRC
STRB
STRA
---0 0001
---0 0001
9Eh
ADRESL
A/D Result Register Low Byte
xxxx xxxx
uuuu uuuu
9Fh
ADCON1
ADFM
—
VCFG1
VCFG0
—
—
—
—
0-00 ----
0-00 ----
Legend:
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Note
1:
MCLR and WDT Reset do not affect the previous value data latch. The RBIF bit will be cleared upon Reset but will set again if the mismatch
exists.
exists.
2:
Accessible only when SSPCON register bits SSPM<3:0> = 1001.
3:
PIC16F884/PIC16F887 only.
4:
If V
DD
goes too low, Power-on Reset will be activated and registers will be affected differently.
5:
See
for Reset value for specific condition.
6:
If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.