Microchip Technology DM164134 Data Sheet

Page of 402
PIC18FXX8
DS41159E-page 8
© 2006 Microchip Technology Inc.
FIGURE 1-1:
PIC18F248/258 BLOCK DIAGRAM          
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
OSC1/CLKI
OSC2/CLKO/RA6
MCLR
V
DD
, V
SS
PORTA
PORTB
PORTC
RA4/T0CKI
RA5/AN4/SS/LVDIN
RB0/INT0
RB4
RC0/T1OSO/T1CKI
RC1/T1OSI
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
Brown-out
Reset
Synchronous
Timer0
Timer1
Timer2
Serial Port
RA3/AN3/V
REF
+
RA2/AN2/V
REF
-
RA1/AN1
RA0/AN0/CV
REF
CAN Module
Timing
Generation
10-bit 
ADC
RB1/INT1
Data Latch
Data RAM
 up to 1536 bytes
Address Latch
Address<12>
12
Bank0, F
BSR
FSR0
FSR1
FSR2
inc/dec
logic
Decode
4
12
4
PCH    PCL
PCLATH
8
31 Level Stack
Program Counter
PRODH
8 x 8 Multiply
W
8
BITOP
8
8
ALU<8>
8
Test Mode
Select
Address Latch
Program Memory
up to 32 Kbytes
Data Latch
21
21
16
8
8
8
Table Pointer<21>
inc/dec logic
21
8
Data Bus<8>
Table Latch
8
IR
12
3
ROM Latch
Timer3
RB2/CANTX/INT2
RB3/CANRX
T1OSI
T1OSO
PCLATU
PCU
Precision
Reference
Band Gap
RB7/PGD
RB5/PGM
RB6/PGC
PBOR
PLVD
CCP1
4X PLL
Band Gap
OSC2/CLKO/RA6
PRODL
Data EEPROM
USART