Microchip Technology DM164134 Data Sheet

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© 2006 Microchip Technology Inc.
DS41159E-page 9
PIC18FXX8
FIGURE 1-2:
PIC18F448/458 BLOCK DIAGRAM
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
OSC1/CLKI
OSC2/CLKO/RA6
MCLR
V
DD
, V
SS
PORTA
PORTB
PORTC
RA4/T0CKI
RA5/AN4/SS/LVDIN
RB0/INT0
RB4
RC0/T1OSO/T1CKI
RC1/T1OSI
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
Brown-out
Reset
Comparators
RA3/AN3/V
REF
+
RA2/AN2/V
REF
-
RA1/AN1
RA0/AN0/CV
REF
Timing
Generation
RB1/INT1
Data Latch
Data RAM
up to 1536 Kbytes
Address Latch
Address<12>
12
Bank0, F
BSR
FSR0
FSR1
FSR2
inc/dec
logic
Decode
4
12
4
PCH    PCL
PCLATH
8
31 Level Stack
Program Counter
PRODL
PRODH
8 x 8 Multiply
W
8
BITOP
8
8
ALU<8>
8
Test Mode
Select
Address Latch
Program Memory
up to 32 Kbytes
Data Latch
21
21
16
8
8
8
Table Pointer<21>
inc/dec logic
21
8
Data Bus<8>
Table Latch
8
        IR
12
3
ROM Latch
PORTD
RD0/PSP0/C1IN+
Enhanced
RB2/CANTX/INT2
RB3/CANRX
T1OSI
T1OSO
PCLATU
PCU
Precision
Reference
Band Gap
PORTE
RE0/AN5/RD
CCP
RB7/PGD
RB5/PGM
RB6/PGC
RD4/PSP4/ECCP1/P1A
RD5/PSP5/P1B
RD6/PSP6/P1C
RD7/PSP7/P1D
RE1/AN6/WR//C1OUT
RE2/AN7/CS/C2OUT
RD1/PSP1/C1IN-
RD2/PSP2/C2IN+
RD3/PSP3/C2IN-
4X
PLL
Band Gap
OSC2/CLKO/RA6
USART
Synchronous
Timer0
Timer1
Timer2
Serial Port
CAN Module
10-bit 
ADC
Timer3
PBOR
PLVD
CCP1
Data EEPROM
USART
Parallel
Slave Port