Microchip Technology DM164134 Data Sheet

© 2006 Microchip Technology Inc.

DS41159E-page 125

15.2.3

SOFTWARE INTERRUPT

When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE registers) clear to avoid false interrupts
and should clear the flag bit CCP1IF, following any
such change in operating mode.

15.2.4

CCP1 PRESCALER

There are four prescaler settings specified by bits
CCP1M3:CCP1M0. Whenever the CCP1 module is
turned off, or the CCP1 module is not in Capture mode,
the prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.

Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 15-1 shows the recom-
mended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.

15.2.5

CAN MESSAGE TIME-STAMP

The CAN capture event occurs when a message is
received in either of the receive buffers. The CAN
module provides a rising edge to the CCP1 module to
cause a capture event. This feature is provided to
time-stamp the received CAN messages. 

This feature is enabled by setting the CANCAP bit of
the CAN I/O control register (CIOCON<4>). The
message receive signal from the CAN module then
takes the place of the events on RC2/CCP1. 

CLRF

CCP1CON, F

; Turn CCP module off 

MOVLW

NEW_CAPT_PS

; Load WREG with the 

; new prescaler mode 

; value and CCP ON 

MOVWF

CCP1CON

; Load CCP1CON with 

; this value 

Note: I/O pins have diode protection to V

DD

 and V

SS

.

CCPR1H

CCPR1L

TMR1H

TMR1L

Set Flag bit CCP1IF

(PIR1<2>)

TMR3
Enable

Qs

CCP1CON<3:0>

CCP1 pin

Prescaler
÷ 1, 4, 16

and

Edge Detect

TMR3H

TMR3L

TMR1
Enable

T3ECCP1

T3CCP1

T3ECCP1

T3CCP1