Microchip Technology DM164134 Data Sheet
© 2006 Microchip Technology Inc.
DS41159E-page 131
PIC18FXX8
16.0
ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULE
COMPARE/PWM (ECCP)
MODULE
This module contains a 16-bit register which can oper-
ate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
ate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
The operation of the ECCP module differs from the
CCP (discussed in detail in Section 15.0 “Capture/
Compare/PWM (CCP) Modules”) with the addition of
an Enhanced PWM module which allows for up to 4
output channels and user selectable polarity. These
features are discussed in detail in Section 16.5
“Enhanced PWM Mode”. The module can also be
programmed for automatic shutdown in response to
various analog or digital events.
CCP (discussed in detail in Section 15.0 “Capture/
Compare/PWM (CCP) Modules”) with the addition of
an Enhanced PWM module which allows for up to 4
output channels and user selectable polarity. These
features are discussed in detail in Section 16.5
“Enhanced PWM Mode”. The module can also be
programmed for automatic shutdown in response to
various analog or digital events.
The control register for ECCP1 is shown in
Register 16-1.
Register 16-1.
REGISTER 16-1:
ECCP1CON: ECCP1 CONTROL REGISTER
Note:
The ECCP (Enhanced Capture/Compare/
PWM) module is only available on
PIC18F448 and PIC18F458 devices.
PWM) module is only available on
PIC18F448 and PIC18F458 devices.
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
EPWM1M1 EPWM1M0
EDC1B1
EDC1B0
ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0
bit 7
bit 0
bit 7-6
EPWM1M<1:0>: PWM Output Configuration bits
If ECCP1M<3:2> = 00, 01, 10:
xx
xx
= P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins
If ECCP1M<3:2> = 11:
00
00
= Single output; P1A modulated; P1B, P1C, P1D assigned as port pins
01
= Full-bridge output forward; P1D modulated; P1A active; P1B, P1C inactive
10
= Half-bridge output; P1A, P1B modulated with deadband control; P1C, P1D assigned as
port pins
11
= Full-bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive
bit 5-4
EDC1B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in ECCPR1L.
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in ECCPR1L.
bit 3-0
ECCP1M<3:0>: ECCP1 Mode Select bits
0000
= Capture/Compare/PWM off (resets ECCP module)
0001
= Unused (reserved)
0010
= Compare mode, toggle output on match (ECCP1IF bit is set)
0011
= Unused (reserved)
0100
= Capture mode, every falling edge
0101
= Capture mode, every rising edge
0110
= Capture mode, every 4th rising edge
0111
= Capture mode, every 16th rising edge
1000
= Compare mode, set output on match (ECCP1IF bit is set)
1001
= Compare mode, clear output on match (ECCP1IF bit is set)
1010
= Compare mode, ECCP1 pin is unaffected (ECCP1IF bit is set)
1011
= Compare mode, trigger special event (ECCP1IF bit is set; ECCP resets TMR1or TMR3
and starts an A/D conversion if the A/D module is enabled)
1100
= PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101
= PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110
= PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111
= PWM mode; P1A, P1C active-low; P1B, P1D active-low
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown