Microchip Technology DM164134 Data Sheet
PIC18FXX8
DS41159E-page 86
© 2006 Microchip Technology Inc.
REGISTER 8-8:
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
U-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
CMIE
(1)
—
EEIE
BCLIE
LVDIE
TMR3IE
ECCP1IE
(1)
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6
CMIE: Comparator Interrupt Enable bit
(1)
1
= Enables the comparator interrupt
0
= Disables the comparator interrupt
bit 5
Unimplemented: Read as ‘0’
bit 4
EEIE: EEPROM Write Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 3
BCLIE: Bus Collision Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 2
LVDIE: Low-Voltage Detect Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 1
TMR3IE: TMR3 Overflow Interrupt Enable bit
1
= Enables the TMR3 overflow interrupt
0
= Disables the TMR3 overflow interrupt
bit 0
ECCP1IE: ECCP1 Interrupt Enable bit
(1)
1
= Enables the ECCP1 interrupt
0
= Disables the ECCP1 interrupt
Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit
is unimplemented and reads as ‘0’.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown