Microchip Technology DM183037 Data Sheet

Page of 696
 2012 Microchip Technology Inc.
DS30575A-page 189
PIC18F97J94 FAMILY
REGISTER 10-19: IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
CCP10IP
CCP9IP
CCP8IP
CCP7IP
CCP6IP
CCP5IP
CCP4IP
ECCP3IP
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CCP10IP: CCP10 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
CCP9IP: CCP9 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5
CCP8IP: CCP8 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4
CCP7IP: CCP7 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
CCP6IP: CCP6 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2
CCP5IP: CCP5 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
CCP4IP: CCP4 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
ECCP3IP: ECCP3 Interrupt Priority bits
1 = High priority
0 = Low priority