Microchip Technology DM183037 Data Sheet
PIC18F97J94 FAMILY
DS30575A-page 226
2012 Microchip Technology Inc.
11.15.3
CONTROLLING PERIPHERAL PIN
SELECT
SELECT
Peripheral Pin Select features are controlled through
two sets of Special Function Registers (SFRs): one to
map peripheral inputs and one to map peripheral
outputs. Because they are separately controlled, a par-
ticular peripheral’s input and output (if the peripheral
has both) can be placed on any selectable function with
the only constraint being that RPn peripherals and pins
can only be mapped within their own group. It is not
possible to map a peripheral to a pin outside of its
group or vice versa.
The association of a peripheral to a peripheral-selectable
pin is handled in two different ways, depending if an input
or output is being mapped.
two sets of Special Function Registers (SFRs): one to
map peripheral inputs and one to map peripheral
outputs. Because they are separately controlled, a par-
ticular peripheral’s input and output (if the peripheral
has both) can be placed on any selectable function with
the only constraint being that RPn peripherals and pins
can only be mapped within their own group. It is not
possible to map a peripheral to a pin outside of its
group or vice versa.
The association of a peripheral to a peripheral-selectable
pin is handled in two different ways, depending if an input
or output is being mapped.
11.15.3.1
Input Mapping
The inputs of the Peripheral Pin Select options are
mapped on the basis of the peripheral; that is, a bit field
associated with a peripheral dictates the pin it will be
mapped to. The RPINRx registers (refer to Register
X-Y and table X-Y) contain sets of 4-bit fields, with each
mapped on the basis of the peripheral; that is, a bit field
associated with a peripheral dictates the pin it will be
mapped to. The RPINRx registers (refer to Register
X-Y and table X-Y) contain sets of 4-bit fields, with each
set associated with one of the remappable peripherals.
Programming a given peripheral’s bit field with an RPn
value maps the RPn pin to that peripheral. For any
given device, the valid range of values for any of the bit
fields corresponds to the maximum number of
peripheral Pin Selections supported by the device.
The PPS-Lite peripheral inputs and associated RPn
pins have been organized into four groups. It is not pos-
sible to map a peripheral to an RPn pin which is outside
of its group. To map a peripheral input signal to an RPn
pin, use the 4-step process as indicated in
Programming a given peripheral’s bit field with an RPn
value maps the RPn pin to that peripheral. For any
given device, the valid range of values for any of the bit
fields corresponds to the maximum number of
peripheral Pin Selections supported by the device.
The PPS-Lite peripheral inputs and associated RPn
pins have been organized into four groups. It is not pos-
sible to map a peripheral to an RPn pin which is outside
of its group. To map a peripheral input signal to an RPn
pin, use the 4-step process as indicated in
Choose the signal and the RPn pin, and the column on
the right shows which value to write to the associated
RPIN register.
The peripheral inputs that support Peripheral Pin
Selection have no default pins. Since the implemented
bit fields of RPINRx registers reset to all ‘1’s, the inputs
are all tied to V
the right shows which value to write to the associated
RPIN register.
The peripheral inputs that support Peripheral Pin
Selection have no default pins. Since the implemented
bit fields of RPINRx registers reset to all ‘1’s, the inputs
are all tied to V
SS
in the device’s default (Reset) state.
For example, to assign U1RX to RP2, write the value,
h’0, to RPINR01<3:0>.
h’0, to RPINR01<3:0>.
illustrates
remappable pin selection for the U1RX input.
FIGURE 11-7:
REMAPPABLE INPUT FOR U1RX
RP0
RP1
RP2
RPn
0
n
1
2
U1RX Input
RPINR01<3:0>
to Peripheral