Microchip Technology DM183037 Data Sheet
PIC18F97J94 FAMILY
DS30575A-page 286
2012 Microchip Technology Inc.
15.1
Timer1/3/5 Gate Control Register
, is used to control the Timerx
gate.
REGISTER 15-2:
TxGCON: TIMERx GATE CONTROL REGISTER
(
)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R-x
R/W-0
R/W-0
TMRxGE
TxGPOL
TxGTM
TxGSPM
TxGGO/TxDONE
TxGVAL
TxGSS1
TxGSS0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMRxGE: Timerx Gate Enable bit
If TMRxON = 0:
This bit is ignored.
If TMRxON = 1:
1 = Timerx counting is controlled by the Timerx gate function
0 = Timerx counts regardless of Timerx gate function
If TMRxON = 0:
This bit is ignored.
If TMRxON = 1:
1 = Timerx counting is controlled by the Timerx gate function
0 = Timerx counts regardless of Timerx gate function
bit 6
TxGPOL: Timerx Gate Polarity bit
1 = Timerx gate is active-high (Timerx counts when gate is high)
0 = Timerx gate is active-low (Timerx counts when gate is low)
1 = Timerx gate is active-high (Timerx counts when gate is high)
0 = Timerx gate is active-low (Timerx counts when gate is low)
bit 5
TxGTM: Timerx Gate Toggle Mode bit
1 = Timerx Gate Toggle mode is enabled.
0 = Timerx Gate Toggle mode is disabled and toggle flip-flop is cleared
Timerx gate flip-flop toggles on every rising edge.
1 = Timerx Gate Toggle mode is enabled.
0 = Timerx Gate Toggle mode is disabled and toggle flip-flop is cleared
Timerx gate flip-flop toggles on every rising edge.
bit 4
TxGSPM: Timerx Gate Single Pulse Mode bit
1 = Timerx Gate Single Pulse mode is enabled and is controlling Timerx gate
0 = Timerx Gate Single Pulse mode is disabled
1 = Timerx Gate Single Pulse mode is enabled and is controlling Timerx gate
0 = Timerx Gate Single Pulse mode is disabled
bit 3
TxGGO/TxDONE: Timerx Gate Single Pulse Acquisition Status bit
1 = Timerx gate single pulse acquisition is ready, waiting for an edge
0 = Timerx gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when TxGSPM is cleared.
1 = Timerx gate single pulse acquisition is ready, waiting for an edge
0 = Timerx gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when TxGSPM is cleared.
bit 2
TxGVAL: Timerx Gate Current State bit
Indicates the current state of the Timerx gate that could be provided to TMRxH:TMRxL; unaffected by the
Timerx Gate Enable (TMRxGE) bit.
Indicates the current state of the Timerx gate that could be provided to TMRxH:TMRxL; unaffected by the
Timerx Gate Enable (TMRxGE) bit.
bit 1-0
TxGSS<1:0>: Timerx Gate Source Select bits
11 = Comparator 2 output
10 = Comparator 1 output
01 = TMR(x+1) to match PR(x+1) output
11 = Comparator 2 output
10 = Comparator 1 output
01 = TMR(x+1) to match PR(x+1) output
(
)
00 = Timer1 gate pin
The Watchdog Timer Oscillator is turned on if TMRxGE = 1, regardless of the state of TMRxON.
The Watchdog Timer Oscillator is turned on if TMRxGE = 1, regardless of the state of TMRxON.
Note 1: Programming the TxGCON prior to TxCON is recommended.
2: Timer(x+1) will be Timer1/3/5 for Timerx (Timer1/3/5), respectively.