Microchip Technology DM183037 Data Sheet
2012 Microchip Technology Inc.
DS30575A-page 433
PIC18F97J94 FAMILY
21.5.2.3
IrDA Decoder Function
The decoder works by taking the serial data from the
RXx pin and replacing it with the decoded data stream.
The stream is decoded based on falling edge
detection of the RXx input.
Each falling edge of RXx causes the decoded data to
be driven low for 16 periods of the 16x Baud Clock. If
another falling edge has been detected by the time the
16 periods expire, the decoded data remains low for
another 16 periods. If no falling edge was detected,
the decoded data is driven high.
Note that the data stream into the device is shifted
anywhere from 7 to 8 periods of the 16x Baud Clock
from the actual message source. The one clock uncer-
tainty is due to the clock edge resolution. See
RXx pin and replacing it with the decoded data stream.
The stream is decoded based on falling edge
detection of the RXx input.
Each falling edge of RXx causes the decoded data to
be driven low for 16 periods of the 16x Baud Clock. If
another falling edge has been detected by the time the
16 periods expire, the decoded data remains low for
another 16 periods. If no falling edge was detected,
the decoded data is driven high.
Note that the data stream into the device is shifted
anywhere from 7 to 8 periods of the 16x Baud Clock
from the actual message source. The one clock uncer-
tainty is due to the clock edge resolution. See
for details.
21.5.2.4
IrDA Receive Polarity
The IrDA receive polarity is selected using the RXDTP
bit. This bit only affects the receive encoder and does
not affect the transmitter.
When RXDTP = 0, the Idle state of the RXx line is ‘1’
(see
bit. This bit only affects the receive encoder and does
not affect the transmitter.
When RXDTP = 0, the Idle state of the RXx line is ‘1’
(see
). When RXDTP = 1, the Idle state of
the RXx line is ‘0’ (see
21.5.2.5
Clock Jitter
Due to jitter or slight frequency differences between
devices, it is possible for the next falling bit edge to be
missed for one of the 16x periods. In that case, one
clock-wide pulse appears on the decoded data stream.
Since the EUSARTx performs a majority detect around
the bit center, this does not cause erroneous data. See
devices, it is possible for the next falling bit edge to be
missed for one of the 16x periods. In that case, one
clock-wide pulse appears on the decoded data stream.
Since the EUSARTx performs a majority detect around
the bit center, this does not cause erroneous data. See
for details.
FIGURE 21-18:
MACRO VIEW OF IrDA
®
DECODING SCHEME (RXDTP = 0)
FIGURE 21-19:
INVERTED POLARITY DECODING RESULTS (RXDTP = 1)
FIGURE 21-20:
CLOCK JITTER CAUSING A PULSE BETWEEN CONSECUTIVE ZEROS
16 Periods
16 Periods
16 Periods
16 Periods
16 Periods
Start BRG
T
IRDEL
Before IrDA Encoder
RXx (rx_in)
Decoded Data
(Transmitting device)
16 Periods
16 Periods
16 Periods
16 Periods
16 Periods
Start BRG
T
IRDEL
Before IrDA Encoder
RXx (rx_in)
Decoded Data
(Transmitting device)
16 Periods
16 Periods
Extra pulse will be ignored
RXx (rx_in)
Decoded Data