Microchip Technology DM183037 Data Sheet
2012 Microchip Technology Inc.
DS30575A-page 435
PIC18F97J94 FAMILY
22.0 12-BIT A/D CONVERTER WITH
THRESHOLD SCAN
The 12-bit A/D Converter has the following key
features:
• Successive Approximation Register (SAR)
features:
• Successive Approximation Register (SAR)
Conversion
• Conversion Speeds of up to 200 ksps at 12 bits
and 500 ksps at 10 bits
• Up to 32 Analog Input Channels (internal and
external)
• Selectable 10-Bit or 12-Bit (default) Conversion
• Resolution
• Multiple Internal Reference Input Channels
• External Voltage Reference Input Pins
• Unipolar Differential Sample-and-Hold (S/H)
• Resolution
• Multiple Internal Reference Input Channels
• External Voltage Reference Input Pins
• Unipolar Differential Sample-and-Hold (S/H)
Amplifier
• Automated Threshold Scan and Compare Opera-
tion to Pre-Evaluate up to 26 Conversion Results
• Selectable Conversion Trigger Source
• Fixed Length (one word per channel),
• Fixed Length (one word per channel),
Configurable Conversion Result Buffer
• Four Options for Results Alignment
• Configurable Interrupt Generation
• Operation During CPU Sleep and Idle modes
The 12-bit A/D Converter module is an enhanced
version of the 10-bit module offered in some PIC18
devices. Both modules are Successive Approximation
Register (SAR) Converters at their cores, surrounded
by a range of hardware features for flexible configura-
tion. This version of the module extends functionality by
providing 12-bit resolution, a wider range of automatic
sampling options, tighter integration with other analog
modules, such as the CTMU, and a configurable
results buffer. This module also includes a unique
Threshold Detect feature that allows the module itself
to make simple decisions based on the conversion
results.
As before, an internal Sample-and-Hold (S/H) amplifier
acquires a sample of an input signal, then holds that
value constant during the conversion process. A com-
bination of input multiplexers selects the signal to be
converted from up to 32 analog inputs, both external
(analog input pins) and internal (e.g., on-chip voltage
references and other analog modules). The whole mul-
tiplexer path includes provisions for differential analog
input, although, with a limited number of negative input
pins. The sampled voltage is held and converted to a
digital value, which strictly speaking, represents the
ratio of that input voltage to a reference voltage.
Configuration choices allow connection of an external
reference or use of the device power and ground (AV
• Configurable Interrupt Generation
• Operation During CPU Sleep and Idle modes
The 12-bit A/D Converter module is an enhanced
version of the 10-bit module offered in some PIC18
devices. Both modules are Successive Approximation
Register (SAR) Converters at their cores, surrounded
by a range of hardware features for flexible configura-
tion. This version of the module extends functionality by
providing 12-bit resolution, a wider range of automatic
sampling options, tighter integration with other analog
modules, such as the CTMU, and a configurable
results buffer. This module also includes a unique
Threshold Detect feature that allows the module itself
to make simple decisions based on the conversion
results.
As before, an internal Sample-and-Hold (S/H) amplifier
acquires a sample of an input signal, then holds that
value constant during the conversion process. A com-
bination of input multiplexers selects the signal to be
converted from up to 32 analog inputs, both external
(analog input pins) and internal (e.g., on-chip voltage
references and other analog modules). The whole mul-
tiplexer path includes provisions for differential analog
input, although, with a limited number of negative input
pins. The sampled voltage is held and converted to a
digital value, which strictly speaking, represents the
ratio of that input voltage to a reference voltage.
Configuration choices allow connection of an external
reference or use of the device power and ground (AV
DD
and AV
SS
). Reference and input signal pins are
assigned differently depending on the particular device.
An array of timing and control selections allow the user
to create flexible scanning sequences. Conversions
can be started individually by program control, continu-
ously free-running or triggered by selected hardware
events. A single channel may be repeatedly converted.
Alternate conversions may be performed on two chan-
nels, or any or all of the channels may be sequentially
scanned and converted according to a user-defined bit
map. The resulting conversion output is a 12-bit digital
number, which can be signed or unsigned, left or right
justified. (In some devices, a user-selectable resolution
of 10 bits is available; in other devices, 12-bit resolution
is the only option available.)
Conversions are automatically stored in a dedicated
buffer, allowing for multiple successive readings to be
taken before software service is needed. The buffer
can be configured to function as a FIFO buffer or as a
channel indexed buffer. In FIFO mode, the buffer can
be split into two equal sections for simultaneous con-
version and read operations. In Indexed mode, the buf-
fer can use the Threshold Scan feature to determine if
a conversion meets specific, user-defined criteria, stor-
ing or discarding the converted value as appropriate,
and then set semaphore flags to indicate the event.
This allows conversions to occur in low-power modes
when the CPU is inactive, waking the device only when
specific conditions have occurred.
The module sets its interrupt flag after a selectable
number of conversions, when the buffer can be read, or
after a successful Threshold Detect comparison. After
the interrupt, the sequence restarts at the beginning of
the buffer. When the interrupt flag is set, according to
the earlier selection, scan selections and the Output
Buffer Pointer return to their starting positions.
During Sleep or Idle mode, the A/D can wake-up at pre-
configured intervals while the device maintains a
Low-Power mode. If threshold conditions have not
been met on any of the conversions, the module will
return to a Low-Power mode.
The A/D module provides configuration to directly inter-
act with the CTMU on specific input channels. This
allows the CTMU to automatically turn on only when
requested directly by the A/D, even though the rest of
the device stays in Sleep mode.
A simplified block diagram for the module is shown in
to create flexible scanning sequences. Conversions
can be started individually by program control, continu-
ously free-running or triggered by selected hardware
events. A single channel may be repeatedly converted.
Alternate conversions may be performed on two chan-
nels, or any or all of the channels may be sequentially
scanned and converted according to a user-defined bit
map. The resulting conversion output is a 12-bit digital
number, which can be signed or unsigned, left or right
justified. (In some devices, a user-selectable resolution
of 10 bits is available; in other devices, 12-bit resolution
is the only option available.)
Conversions are automatically stored in a dedicated
buffer, allowing for multiple successive readings to be
taken before software service is needed. The buffer
can be configured to function as a FIFO buffer or as a
channel indexed buffer. In FIFO mode, the buffer can
be split into two equal sections for simultaneous con-
version and read operations. In Indexed mode, the buf-
fer can use the Threshold Scan feature to determine if
a conversion meets specific, user-defined criteria, stor-
ing or discarding the converted value as appropriate,
and then set semaphore flags to indicate the event.
This allows conversions to occur in low-power modes
when the CPU is inactive, waking the device only when
specific conditions have occurred.
The module sets its interrupt flag after a selectable
number of conversions, when the buffer can be read, or
after a successful Threshold Detect comparison. After
the interrupt, the sequence restarts at the beginning of
the buffer. When the interrupt flag is set, according to
the earlier selection, scan selections and the Output
Buffer Pointer return to their starting positions.
During Sleep or Idle mode, the A/D can wake-up at pre-
configured intervals while the device maintains a
Low-Power mode. If threshold conditions have not
been met on any of the conversions, the module will
return to a Low-Power mode.
The A/D module provides configuration to directly inter-
act with the CTMU on specific input channels. This
allows the CTMU to automatically turn on only when
requested directly by the A/D, even though the rest of
the device stays in Sleep mode.
A simplified block diagram for the module is shown in