Microchip Technology DM183037 Data Sheet

Page of 696
 2012 Microchip Technology Inc.
DS30575A-page 647
PIC18F97J94 FAMILY
FIGURE 31-7:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND 
POWER-UP TIMER TIMING 
FIGURE 31-8:
BROWN-OUT RESET TIMING       
TABLE 31-22: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER 
AND BROWN-OUT RESET REQUIREMENTS
Param. 
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
30
TmcL
MCLR Pulse Width (low) 
s
31
T
WDT
Watchdog Timer Time-out Period (no 
postscaler)
4.00
ms
32
T
OST
Oscillation Start-up Timer Period
1024 T
OSC
1024 T
OSC
T
OSC
 = OSC1 period
33
T
PWRT
Power-up Timer Period
300 µs
s 
34
T
IOZ
I/O High-Impedance from MCLR Low 
or Watchdog Timer Reset
2
s
35
T
BOR
Brown-out Reset Pulse Width
200
s
V
DD
 
 BV
DD
 (see D005)
36
T
IRVST
Time for Internal Reference 
Voltage to become Stable
25
s
37
T
HLVD
High/Low-Voltage Detect Pulse Width
200
s
V
DD
 
 V
HLVD
38
T
CSD
CPU Start-up Time
5
10
s
39
T
IOBST
Time for INTOSC to Stabilize
1
s
V
DD
MCLR
Internal
POR
PWRT
Time-out
Oscillator
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
34
I/O pins
34
Note:
Refer to 
 for load conditions.
V
DD
BV
DD
35
V
BGAP
 = 1.2V
V
IRVST
Enable Internal
Internal Reference
36
Reference Voltage
Voltage Stable