Microchip Technology DM183037 Data Sheet
PIC18F97J94 FAMILY
DS30575A-page 84
2012 Microchip Technology Inc.
REGISTER 4-9:
PMD4: PERIPHERAL MODULE DISABLE REGISTER 4
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
CMP1MD
CMP2MD
CMP3MD
USBMD
IOCMD
LVDMD
—
EMBMD
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
CMP1MD: CMP1 Module Disable bit
1 = The CMP1 module is disabled; all CMP1 registers are held in Reset and are not writable
0 = The CMP1 module is enabled
1 = The CMP1 module is disabled; all CMP1 registers are held in Reset and are not writable
0 = The CMP1 module is enabled
bit 6
CMP2MD: CMP2 Module Disable bit
1 = The CMP2 module is disabled; all CMP2 registers are held in Reset and are not writable
0 = The CMP2 module is enabled
1 = The CMP2 module is disabled; all CMP2 registers are held in Reset and are not writable
0 = The CMP2 module is enabled
bit 5
CMP3MD: CMP3 Module Disable bit
1 = The CMP3 module is disabled; all CMP3 registers are held in Reset and are not writable
0 = The CMP3 module is enabled
1 = The CMP3 module is disabled; all CMP3 registers are held in Reset and are not writable
0 = The CMP3 module is enabled
bit 4
USBMD: USB Module Disable bit
1 = The USB module is disabled; all USB registers are held in Reset and are not writable
0 = The USB module is enabled
1 = The USB module is disabled; all USB registers are held in Reset and are not writable
0 = The USB module is enabled
bit 3
IOCMD: Interrupt-on-Change Module Disable bit
1 = The IOC module is disabled; all IOC registers are held in Reset and are not writable
0 = The IOC module is enabled
1 = The IOC module is disabled; all IOC registers are held in Reset and are not writable
0 = The IOC module is enabled
bit 2
LVDMD: Low Voltage Detect Module Disable bit
1 = The LVD module is disabled; all LVD registers are held in Reset and are not writable
0 = The LVD module is enabled
1 = The LVD module is disabled; all LVD registers are held in Reset and are not writable
0 = The LVD module is enabled
bit 1
Unimplemented: Read as ‘0’
bit 0
EMBMD: EMB Module Disable bit
1 = The EMB module is disabled; all EMB registers are held in Reset and are not writable
0 = The EMB module is enabled
1 = The EMB module is disabled; all EMB registers are held in Reset and are not writable
0 = The EMB module is enabled