Freescale Semiconductor Xtrinsic MMA955xL Intelligent Motion-Sensing Platform KITMMA9550LEVM KITMMA9550LEVM User Manual

Product codes
KITMMA9550LEVM
Page of 410
System Integration Module
MMA955xL Intelligent, Motion-Sensing Platform Hardware Reference Manual, Rev. 1.0
Freescale Semiconductor, Inc.
197
11.6
SIM memory map and registers
11.6.1
SIM memory map
Table 11-1. Unclocked interrupt support
Sub-System
Unclocked interrupts?
Slave Port
Yes - This module operates independently of the CLKGEN module
Master I
2
C
No
16-bit Modulo Timer
No
Two-channel Timer/PWM
No
IRQ External Interrupt
Yes
AFE
No
SIM
Start 
D
1
1
Only applicable in STOP
FC
 and STOP
SC
 modes.
Table 11-2. Module Memory Map
Offset
Address
Register Name
Access
Reset
Section/Page
0x0
STOP Control and Status Register (STOPCR)
RW
0x00
0x1
Frame Control and Status Register (FCSR)
RW
0x20
0x2
Reset Status and Control Register (RSCR)
RW
0x01
0x4
Peripheral Clock Enable Register 0 for STOP
FC
 mode (PCESFC0)
RW
0xFF
0x5
Peripheral Clock Enable Register 1 for STOP
FC
 mode (PCESFC1)
RW
0xFF
0x6
Peripheral Clock Enable Register 0 for STOP
SC
 mode (PCESSC0)
RW
0xFF
0x7
Peripheral Clock Enable Register 1 for STOP
SC
 mode (PCESSC1)
RW
0xFF
0x8
Peripheral Clock Enable Register 0 for RUN mode (PCERUN0)
RW
0xFF
0x9
Peripheral Clock Enable Register 1 for RUN mode (PCERUN1)
RW
0xFF
0xA
Pin Mux Control Register0 (PMCR0)
RW
0x00
0xB
Pin Mux Control Register1 (PMCR1)
RW
0x00
0xC
Pin Mux Control Register2 (PMCR2)
RW
0x00