Taskit ARM9 CPU-module with Linux Stamp9261-series Stamp9261 (64F/64R) 542310 Data Sheet
Product codes
542310
4.7. Clock Generator and Power Management Controller (PMC)
a) SAM9261 Clocks
The Stamp9261's SAM9261 Processor generates its necessary clocks based on two crystal
oscillators:
The Stamp9261's SAM9261 Processor generates its necessary clocks based on two crystal
oscillators:
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Slow Clock (SLCK) Oscillator, running at 32768 Hz,
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Main Clock Oscillator, running at 18.432 MHz.
From the Main Clock Oscillator, the Clock Generator produces two further clocks by using two PLLs:
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PLLA provides the 200 MHz Processor Clock (PCK) and the
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Master Clock (MCK) = PCK/2 = 100 MHz
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PLLB provides the 96 MHz USB Clock.
Apart from the USB Clock, most of the peripheral clocks are derived from MCK:
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SDRAM, LCDC, USART, SPI, TWI, SSC, PIT, TC.
The TC unit can also run on SLCK. The RTT always runs on SLCK.
b) Programmable Clocks
Four programmable clock outputs PCK0, PCK1, PCK2 and PCK3 are available on the connectors of
the Stamp9261. They can individually be programmed to the SLCK, PLLA, PLLB, and Main Clock, as
well as these values divided by 2, 4, 8, 16, 32, or 64.
Four programmable clock outputs PCK0, PCK1, PCK2 and PCK3 are available on the connectors of
the Stamp9261. They can individually be programmed to the SLCK, PLLA, PLLB, and Main Clock, as
well as these values divided by 2, 4, 8, 16, 32, or 64.
c) PMC Control Functions
The PMC has a Peripheral Clock register which allows to enable or disable the clocks of all integrated
peripherals individually using their "Peripheral Identifier" (see table Peripheral Identifiers).
The PMC has a Peripheral Clock register which allows to enable or disable the clocks of all integrated
peripherals individually using their "Peripheral Identifier" (see table Peripheral Identifiers).
The System Clock register allows to enable or disable each of the following clocks individually:
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Processor clock,
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LCD clock (HCK1)
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USB Host clock (common for both channels)
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USB Device clock
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Programmable Clocks
The HCK0 bit mentioned in the Atmel manual is not used in the SAM9261 processor.
d) PMC Supervisory Functions
The PMC provides status flags for the
The PMC provides status flags for the
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Main Oscillator
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Master Clock
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PLLA
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PLLB
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Programmable Clocks
The PMC status register provides "Clock Ready" or, respectively, "PLL Lock" status bits for each of
these clocks. An interrupt is generated when any of these bits changes from 0 to 1.
these clocks. An interrupt is generated when any of these bits changes from 0 to 1.
The Main Oscillator frequency can be measured by using the PMC Main Clock Frequency register.
The SLCK is used as reference for the measurement.
The SLCK is used as reference for the measurement.
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