STMicroelectronics FlexSPIN: SPI configurable stepper and DC multi motor driver evaluation board EVAL6460 EVAL6460 Data Sheet
Product codes
EVAL6460
L6460
Supervisory system
Doc ID 17713 Rev 1
33/139
state. This stretch time can be selected by setting the ID[1:0] bits in the SampleID register
according to following table.
according to following table.
When nRST_int becomes active (logic level = “0”) it sets in their reset state some of the
functions inside L6460. The main functions that will be reset by nRST_int signal are the
following:
functions inside L6460. The main functions that will be reset by nRST_int signal are the
following:
–
Serial interface will be reset and will not accept any other command.
–
The bridges 1 and 2 will place their outputs in high impedance and PWM and
direction signals will be reset.
direction signals will be reset.
–
AD converter will be powered off.
–
GPIOs will be powered off.
–
Current DAC will be powered off.
–
Operational amplifiers will be powered off.
–
Watchdog count will be reset (while Watchdog flags won’t be reset).
–
Interrupt controller will be powered off.
–
Digital comparator will be powered off.
Additionally the system regulators will be powered off but only if the voltage that caused the
nRST_int event is checked before the system regulator in the power up sequence. This
means that:
nRST_int event is checked before the system regulator in the power up sequence. This
means that:
–
all system regulators will be powered off if nRST_int is caused by V
Supply
,
V
SupplyInt
, V
Pump
(and also if V3v3 causes a POR);
–
no one of the system regulators will be powered off if nRST_int is caused by
V
V
GPIO_SPI
;
–
only the system regulators that follows the system regulator that caused the
nRST_int in power up sequence will be powered off.
nRST_int in power up sequence will be powered off.
Table 6.
Stretch time selection
ID[1]
ID[0]
Selected stretch time
Note
Typ
0
0
16ms
Default state
0
1
32ms
1
0
48ms
1
1
64ms