Intel 807 AV8062701079702 Data Sheet

This feature is disabled by default. BIOS must enable it in the

PMG_CST_CONFIG_CONTROL register. The auto-demotion policy is also configured by

this register.

The processor supports C0, C1/C1E, C3, C6, C7, C8, C9, and C10 power states.The

following is a summary of the general rules for package C-state entry. These apply to

all package C-states, unless specified otherwise:
•

A package C-state request is determined by the lowest numerical core C-state

amongst all cores.

•

A package C-state is automatically resolved by the processor depending on the

core idle power states and the status of the platform components.
— Each core can be at a lower idle power state than the package if the platform

does not grant the processor permission to enter a requested package C-state.

— The platform may allow additional power savings to be realized in the

processor.

— For package C-states, the processor is not required to enter C0 state before

entering any other C-state.

— Entry into a package C-state may be subject to auto-demotion – that is, the

processor may keep the package in a deeper package C-state than requested

by the operating system if the processor determines, using heuristics, that the

deeper C-state results in better power/performance.

The processor exits a package C-state when a break event is detected. Depending on

the type of break event, the processor does the following:
•

If a core break event is received, the target core is activated and the break event

message is forwarded to the target core.
— If the break event is not masked, the target core enters the core C0 state and

the processor enters package C0 state.

— If the break event is masked, the processor attempts to re-enter its previous

package state.

•

If the break event was due to a memory access or snoop request,
— But the platform did not request to keep the processor in a higher package C-

state, the package returns to its previous C-state.

— And the platform requests a higher power C-state, the memory access or

snoop request is serviced and the package remains in the higher power C-

state.

The following table shows package C-state resolution for a dual-core processor. The

following figure summarizes package C-state transitions.

5th Generation Intel

®

 Core

™

 Processor Family, Intel

®

 Core

™

 M Processor Family, Mobile Intel

®

 Pentium

®

 Processor Family, and

Mobile Intel

®

 Celeron

®

 Processor Family

Datasheet – Volume 1 of 2

March 2015

50

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