Intel i3-2328M FF8062701275100 Data Sheet

Datasheet, Volume 1

85

The processor has VCC, VCCIO, VDDQ, VCCPLL, VCCSA, VAXG and VSS (ground) inputs 
for on-chip power distribution. All power pins must be connected to their respective 
processor power planes, while all VSS pins must be connected to the system ground 
plane. Use of multiple power and ground planes is recommended to reduce I*R drop. 
The VCC pins and VAXG pins must be supplied with the voltage determined by the 
processor Serial Voltage IDentification (SVID) interface. 

 specifies the voltage 

level for the various VIDs.

Due to its large number of transistors and high internal clock speeds, the processor is 
capable of generating large current swings between low- and full-power states. To keep 
voltages within specification, output decoupling must be properly designed.

Design the board to ensure that the voltage provided to the processor remains within 

the specifications listed in 

. Failure to do so can result in timing violations or 

reduced lifetime of the processor.

The voltage regulator solution must:

• provide sufficient decoupling to compensate for large current swings generated 

during different power mode transitions.

• provide low parasitic resistance from the regulator to the socket.
• meet voltage and current specifications as defined in 

An on-die PLL filter solution is implemented on the processor.