Intel 9560 CM8063101049716 Data Sheet
Product codes
CM8063101049716
Electrical Specifications
68
Intel
®
Itanium
®
Processor 9300 Series and 9500 Series Datasheet
2.11.3
Power-up Voltage Sequence Timing Requirements
2.12
Supported Power-down Voltage Sequence
The supported power down sequence of voltage for the processor is detailed in
. It should be noted that when the processor is required to be physically
removed from its socket, power rails VCC33_SM and Vcc(12V) must also be powered
down before removal of the processor.
down before removal of the processor.
Table 2-39. Power-up Voltage Sequence Timing Requirements
Parameter
Min
Max
Unit
VCC33_SM stable high to VCCA delay
>0
VCCA to VCCIO delay time
0
μs
VCCIO to PWRGOOD high delay time
1000
ms
VCCIO stable high to SYSCLK
>0
μs
SYSCLK valid before VROUTPUTENABLE0 high
>0
μs
VCCIO stable before VROUTPUT_ENABLE0 high for Intel
®
Itanium
®
Processor 9300 Series
1
>1
μs
VCCIO stable before VROUTPUT_ENABLE0 high for Intel
®
Itanium
®
Processor 9500 Series
2
>1
ms
VROUTPUT_ENABLE0 high to VRPWRGOOD high for Intel
®
Itanium
®
Processor 9300 Series
1
200
ms
VROUTPUT_ENABLE0 high to VR_READY for Intel
®
Itanium
®
Processor 9500 Series
2
200
ms
VCCUNCORE time to stabilize
1
1
5
ms
Delay from VCCUNCORE at programmed VID value to VCCCORE
1
0.05
8
ms
VCCCORE steady at safe VID value
1
0.05
3
ms
VCCCORE transition time from safe VID to programmed VID
1
2.5
Delay from VCCCORE/VCCUNCORE/VCCCACHE at programmed
values to VRPWRGOOD high for Intel
®
Itanium
®
Processor 9300
Series
1
0.05
3
VRPWRGD high to PWRGOOD high for Intel® Intel
®
Itanium
®
Processor 9300 Series
>0
ms
VR_READY high to PWRGOOD high for Intel
®
Itanium
®
Processor
9500 Series
>0
ms
PWRGOOD high to RESET_N high (t
RESET_N
) Intel
®
Itanium
®
Processor 9300 Series
10
ms
PWRGOOD high to RESET_N high (t
RESET_N
) Intel
®
Itanium
®
Processor 9500 Series
15
ms