Intel C2550 FH8065401488912 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

201

The integrated GbE controller requires a differential, non spread-spectrum, reference 

clock for most of its MAC operation. The platform board must provide this clock. The 

center frequency of the reference clock must be 100 MHz, except when 2500BASE-X 

(2.5 GbE) is used. For 2500BASE-X the center frequency must be 125 MHz. The 

.

There are three SoC hard pin-straps that are related to the integrated GbE controller 

and need attention. Three of the SoC pins are:

• Pin W54 - GPIO_SUS1: Used to enable/disable the 2.5 GbE feature.
• Pin Y59 - NCSI_ARB_OUT: Used to choose SMBus or NC-SI as the interface for 

management.

• Pin V63 - NCSI_RXD1: Whether or not the GbE controller has power during the S5 

(Soft Off) Sleep State.

Additional information for these pins is in 

.