Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
231
Volume 2—PCI Express Root Ports (RP)—C2000 Product Family
Interrupts and Events
12.5
Interrupts and Events
A root port can handle interrupts and events from an endpoint device. A root port also 
generates its own interrupts for some events, including power management events, but 
also including error events.
A root port receives two interrupt types from an endpoint device: INTx (legacy) and 
MSI. MSIs are automatically passed upstream by the root port, just as other memory 
writes are passed. INTx messages are delivered to the legacy block interrupt router/
controller by the root port.
Events and interrupts that are handled by the root port are shown with the interrupts 
they deliver to the interrupt decoder/router.
Note:
 lists the interrupts and events generated based on packets received, or 
events generated in the root port. Configuration is needed by the software to enable 
the different interrupts as applicable.
When INTx interrupts are received by an end point, they are mapped to the interrupts 
 and sent to the interrupt decoder/router in the Intel SoC legacy 
block.
Note:
Interrupts generated from events within the root port are not swizzled.
Table 12-4. Interrupts Generated From Events/Packets
Packet/Event
Type
INTx
MSI
SERR
SCI
SMI
GPE
INTx
Packet
X
X
PM_PME
Packet
X
X
Power Management (PM)
Event
X
X
X
X
ERR_CORR
Packet
X
ERR_NONFATAL
Packet
X
ERR_FATAL
Packet
X
Internal Error
Event
X
VDM
Packet
X
Table 12-5. Interrupt Generated for INT[A-D] Interrupts
INTA
INTB
INTC
INTD
Root Port 1
INTA#
INTB#
INTC#
INTD#
Root Port 2
INTD#
INTA#
INTB#
INTC#
Root Port 3
INTC#
INTD#
INTA#
INTB#
Root Port 4
INTB#
INTC#
INTD#
INTA#