Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

229

The 16-bit Memory Base field and the 16-bit Memory Limit field in the standard PCI 

Bridge Header in Configuration Space define how the root port treats PCI non-

prefetchable memory-addressed transactions between its primary (Root Complex side) 

and secondary (downstream link) interfaces.

Non-prefetchable memory-addressed transactions are typically used for Memory-

Mapped I/O (MMIO) access and are always 32-bit-memory-space addresses.

The Memory Base and Memory Limit fields establish the starting and ending memory-

mapped addresses the root port accepts for forwarding for non-prefetchable memory 

transactions. Bits [15:4] of these fields define bits [31:20] for non-prefetchable 

memory transaction addresses for the Base and Limit addresses. Bits [19:0] for the 

Memory Base address are fixed as zero. Bits [19:0] for the Memory Limit address are 

fixed as all ones.

Notice the 1-KB granularity of the forwarding range.

The following fields in the standard PCI Bridge Header in the configuration space define 

how the root port treats PCI prefetchable memory-addressed transactions between its 

primary (Root Complex side) and secondary (downstream link) interfaces.

The root ports support 64-bit prefetchable memory-addressed transactions. The fields 

are set for this support.

Together with the Prefetchable Base Upper 32-Bits field, the Prefetchable Memory Base 

field establishes the starting memory-mapped addresses the root port accepts for 

forwarding prefetchable memory transactions. Likewise, the Prefetchable Limit Upper 

32-Bits field and the Prefetchable Memory Limit field establishes the ending address.

As the name implies, the Prefetchable Base Upper 32-Bits field is bits [63:32] of the 

starting address. Likewise, the Prefetchable Limit Upper 32-Bits field is bits [63:32] of 

the ending address.

The Prefetchable Memory Base field bits [15:4] define bits [31:20] for the starting 

address. The Prefetchable Memory Base address bits [19:0] are fixed as zero.

The Prefetchable Memory Limit field bits [15:4] define bits [31:20] for the ending 

address. The Prefetchable Memory Limit address bits [19:0] are fixed as all ones.

Notice the 1-MB granularity of the forwarding range.