Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

271

The BIOS and the firmware control which USB ports are usable to the end-user. They 

also designate which ports have non-removable devices versus which ports are 

exposed to the end user. The system BIOS is expected to set these values upon boot 

and resuming from Sx states.

For details, see Chapter 4 of the Enhanced Host Controller Interface Specification for 

Universal Serial Bus, Revision 1.0. Some information from that chapter is presented 

below.

HOT

 device power management state to the D0 state. The 

effects of these resets are shown in 

If the detailed register descriptions give exceptions to these rules, those exceptions 

override these rules. This summary is provided to help explain the reasons for the reset 

policies.

HCRESET

bit set.

Memory space 

registers except 

Structural Parameters 

(which is written by 

the BIOS).

Configuration 

registers.

The HCRESET must only affect 

registers that the EHCI driver controls. 

PCI Configuration space and the 

BIOS-programmed parameters are 

not reset.

D3-to-D0 Reset

The software writes 

the Device Power 

State from D3

HOT

 

(11b) to D0 (00b).

Core power well 

registers

(except the BIOS-

programmed 

registers).

Suspend (SUS) power 

well registers.
The BIOS-

programmed Core 

power well registers.

The D3-to-D0 transition must not 

cause wake information (SUS well) to 

be lost. Also, this transition must not 

clear the BIOS-programmed registers 

because the BIOS is not invoked 

following the D3-to-D0 transition.