Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

277

The SoC provides the ability for the debugger software to interact with the product 

through one of the USB 2.0 ports (Port #1). High-level restrictions and features are:

• Must be operational before USB 2.0 drivers are loaded.
• Functions even when the port is disabled.
• The Debug Port is not used to debug an issue that requires the connection of a full-

speed/low-speed device on Port #1.

• Allows normal system USB 2.0 traffic in a system that is configured to have only 

one USB port.

• The Debug Port device (DPD) must be high-speed capable and connect directly to 

Port #1. The DPD cannot be connected to Port #1 through a USB hub.

• Debug Port FIFO always makes forward progress (a bad status on the USB is 

presented back to the software).

• The Debug Port FIFO is only given one USB access per microframe.

The Debug port facilitates operating system and device driver debug. This port allows 

the software to communicate with an external console using a USB 2.0 connection. 

Because the interface to this link does not go through the normal USB 2.0 stack, it 

allows communication with the external console during cases where the operating 

system is not loaded, the USB 2.0 software is broken, or where the USB 2.0 software is 

being debugged. Specific features of this implementation of a debug port are:

• Only works with an external USB 2.0 debug device (console).
• Implemented for a specific port on the host controller.
• Operational anytime the port is not suspended AND the host controller is in D0 

power state.

• Capability is interrupted when port is driving USB RESET.