Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Volume 2—SMBus 2.0 Unit 1 - Host—C2000 Product Family
Controller Characteristics and Operation
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
320
Order Number: 330061-002US
15.4.8.2
Target Descriptor
Unlike the master descriptor, the target descriptor is a ring buffer of data and status all 
existing concurrently. This simplified model results in the hardware writing status of a 
received cycle immediately followed by the data received in the cycle (if applicable).
See also TRxSTS, which is used for debug.
Figure 15-7. Target Ring Buffer
Figure 15-8. Target Header Format
Header1
Header 2
Header 3
Header 4
Target Interface
Data 1
Data 3
Target Buffer Base Address
rsvd
Byte 
Count
Status
FW Target Tail Ptr
HW Target Head Ptr
Increasing 
Memory
TB
Size
+0
< Byte 0
TTYP
2
1
0
5
4
3
6
7
+1
2
1
0
5
4
3
6
7
+2
2
1
0
5
4
3
6
7
+3
2
1
0
5
4
3
6
7
31
30
29
28
27
26
25
24 23
22
21
19
20
18
17
16
15
14 13 12 11
10
9
8
7
6
5
4
3
2
1
0
< Bit #
TSTS
MTYPE
R
R
PBC
RBC