Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

322

Order Number: 330061-002US

Only certain combinations of target descriptor MTYPE and TTYPE are valid. These are 

summarized in 

 (shaded cells and all unlisted combinations are invalid). For 

each valid (MTYPE, TTYPE) pair a reference is included to the detailed hardware 

flowchart.

7:4

TSTS

: This field indicates the overall completion status of the 

transaction, i.e., success, fail, error condition, etc. Multiple error conditions occur in the 

same transaction (e.g., the hardware NACKs a byte and instead of external master 

signalling stop, it continues to toggle clock and eventually holds clock low and causes 

time-out). The hardware captures the first error condition, i.e., register reads 0011 for 

the example listed above.
Refer to 

0000: Success with no errors.
0001: Speculative PEC error detected (the hardware always presumes PEC-enabled 

writes received).
0010: Protocol error, i.e., external master violated SMBus protocol. For example this is 

asserting STOP in the middle of the byte, or stopped toggling clock, or doing an illegal 

repeated start, collision, etc.
0011: Hardware NACK, i.e., the hardware NACKed one or more bytes as the byte did not 

match the expected byte of the sequence or exceeded hardware limitations. 

This is the hardware overflow and does not comprehend overflow of an 

individual protocol (e.g., Block Write, received bytes > indicated Byte Count).

0100: External NACK (external master NACKed at least 1 byte supplied by the hardware 

on externally generated read).
0101: Clock-low time-out
0110: Data-low time-out
Others: Reserved

3:0

TTYPE

: This field indicates the type of transaction received by the hardware 

in terms of the various usage models supported:
0000: Default SMBus transaction to C2h
0001: Transaction targeting address (TACTRL.ADDR0) of UDID0
0010: Transaction targeting address (TACTRL.ADDR1) of UDID1
0100: Host Notify transaction targeting 10h
0101: Generic Programmable Block Read to programmed address in 

GPBRCTRL.GPTRADR
Others: Reserved

This definition is consistent with TSTS.TCIP.