Intel C2518 FH8065501516710 Data Sheet

Product codes

FH8065501516710

Intel

Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

323

Volume 2—SMBus 2.0 Unit 1 - Host—C2000 Product Family

Controller Characteristics and Operation

15.4.8.3

Target Transaction Status

Table 15-19

provides a reference of the encodings of the transaction status (TSTS)

nibble in the header WB for all valid target cycles (TTYPE).

Table 15-18. Valid Target Descriptor MTYPE and TTYPE Combinations

MTYPE

ARP-Related

1000

1001

1010

1011

1100

1101

SMBus/I

0000

Notify Host

1111

GPBR

0111

TTYPE

0000

Section 15.4.8.5.2,

“SMBus ARP Target

Flow” on page 332

Invalid

0001
0010

Invalid

Invalid

0100

Invalid

Section 15.4.8.5.1,

“Host Notify Target

Flow” on page 332

Invalid

0101

Invalid