Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

346

Order Number: 330061-002US

The SMT supports several types of soft reset including:

• Function-level reset as defined by the PCI Local Bus Specification, Revision 3.0 (see 

DEVCTL.IFLR).

• Soft reset directed to the SMT controller (see GCTRL.SRST).

In each case, the soft reset applies only to the specific SMT function addressed. 

Asserting a soft reset has these effects:

• An immediate and abrupt reset of the SMT Master and Target logic (which causes a 

protocol violation of any pending master or target cycles),

• Clear all the MMIO registers except those register bits denoted as sticky or RW-O or 

primary-reset-only (PRST) as listed in 

, and

• Release the SMBus Clock and Data lines.

AERCAPCTL.FEP

AERHDRLOG.TLPHDRLOG

ERRCORMSK.x, x = CIEM, ANFEM

ERRCORSTS.x, x = CIE, ANFE

ERRUNCMSK.x, x = UIEM, UREM, MTLPEM, UCEM, CAEM, CTEM, PTLPEM

ERRUNCSEV.x, x = UIES, URES, MTLPES, UCES, CAES, CTES, PTLPES

ERRUNCSTS.x, x = UIE, URE, MTLPE, UCE, CAE, CTE, PTLPE

PMCSR.PMEEN

RID.RID

AERCAPHDR.NCO

CAPPTR.CPTR

CCR.x, x = BASE, SUB, RLPI

DEVCAP.FLR

DEVCAP2.CTRS

INTP.INTP

PLKCTL.CL

PMCSR.NSR

SID.SID

SVID.SVID