Intel C2518 FH8065501516710 Data Sheet

Intel

Product codes

FH8065501516710

Intel

®

Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

439

Volume 2—SMBus 2.0 Unit 0 - PCU—C2000 Product Family

System Host Controller

18.3.6

SMBus CRC Generation and Checking

If the SMB_Mem_AUXC.AAC is set, the SoC automatically calculates and drives the

Cyclic Redundancy Check (CRC) at the end of the transmitted packet for write cycles

and checks the CRC for read cycles. It does not transmit the contents of the Packet

Error Check Data (SMB_Mem_PEC) PEC register for a CRC. The

SMB_Mem_HCTL.PECEN bit must not be set if this bit is set, or unspecified behavior

If the read cycle results in a CRC error, the SMB_Mem_HSTS.DEVERR bit and the

SMB_Mem_AUXS.CRCE bit are set.