Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Volume 2—Serial Peripheral Interface (SPI)—C2000 Product Family
Operation Modes
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
474
Order Number: 330061-002US
22.4
Operation Modes
The SoC SPI controller can operate in two different operation modes: 
• Descriptor Mode 
• Non-Descriptor Mode
The non-descriptor mode is not supported and a valid Flash Descriptor is required for 
this SoC.
22.4.1
Non-Descriptor Mode
If no valid signature is read (either because no SPI Flash exists, or an SPI Flash exists 
with no valid descriptor), the Flash controller operates in a non-descriptor mode. This is 
sometimes referred to as ICH7 mode.
The SoC SPI controller operates in the non-descriptor mode when the contents of the 
Flash Valid Signature are read and determined to be invalid. This happens if no SPI 
Flash exists or an SPI Flash exists with no valid descriptor. Also, this holds true 
regardless if the SPI is configured to be the location of the boot device or if the LPC 
interface is configured to be the location of the boot device.
The following features are not supported in the non-descriptor mode:
• Secure Boot
• Soft  straps
• Two SPI Flash device support
• Hardware sequencing access
• Descriptor-based security access restrictions
In this mode, software sequencing must be used to access the Flash.
If a Flash Memory device is attached to the SPI controller and the controller is 
operating in the non-descriptor mode, ensure that the Flash Valid Signature, at offset 
10h of the Flash Descriptor, does not equal the expected valid value of 0FF0_A55Ah. 
Here the SPI controller wrongly interprets that it has a valid signature and that a Flash 
Descriptor has been implemented.
The SPI allows high-speed support or NOR Flash memory access.