Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

477

• The Reserved section at offset 0h is related to functionality not supported.
• The Signature section selects the descriptor mode and verifies if the Flash is 

programmed and functioning. The data at the bottom of the Flash (offset 10h) 

must be 0FF0A55Ah to be in the descriptor mode. 

• The Descriptor Map section defines the logical structure of the Flash in addition to 

the number of components used.

• The Component section has information about the SPI Flash in the system 

including: 

— Density of each component
— Illegal instructions (such as chip erase)
— Frequencies for read, fast read, and write/erase instructions

• The Region section points to the four other regions and the size of each region. 
• The Master region contains the security settings for the Flash, grants read/write 

permissions for each region, and identifies each master by a requestor ID. 

• The Soft Straps section contains parameter bits that are used to configure the SoC 

features and/or behaviors. See 

.

• The Reserved section between the top of the Soft Straps section and the bottom 

of the VSCC Table is reserved.

• The VSCC Table section holds the JEDEC ID and the Vendor Specific Component 

Capabilities (VSCC) information of the entire SPI Flash supported by the NVM 

image.

• The Descriptor Upper Map section determines the length and base address of the 

VSCC Table section.

• The OEM Section is 256-bytes reserved at the top of the Flash Descriptor for use 

by an OEM.