Intel C2518 FH8065501516710 Data Sheet

Product codes

FH8065501516710

Intel

Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

479

Volume 2—Serial Peripheral Interface (SPI)—C2000 Product Family

Flash Access

22.6

Flash Access

The two types of Flash accesses are:

• Direct Access
• Program Register Access

22.6.1

Direct Access

• Direct writes to the SPI Flash are not allowed by any SoC internal initiator.
• The CPU core is only allowed to do a direct read of the BIOS region.

Note:

The BIOS Decode Enable (BDE) register which is located in the configuration space at

bus 0, device 31 (decimal), function 0, at offset D8h allows for BIOS MMIO space up to

16MB to be forwarded to the SPI controller. The SPI controller will direct these access

to the BIOS region (assuming it is 16MB). All other access must use Program Register

Access (see HSFSTS, HSFCTL, FADDR and FDATA0)

22.6.1.1

Security

• The calculated Flash Linear Address (FLA) must fall between the primary region

base/limit.

Note:

During the non-descriptor mode, the Flash physical address is used instead. Only the

two BIOS ranges at the E0000h and F0000h segments below 1 MB are supported.

• Direct read cache contents are reset to 0s on a read from a different master.