Intel E3845 FH8065301487715 Data Sheet
Product codes
FH8065301487715
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
4385
31.5.4
FADDR (Flash_Address_bios)—Offset 8h
Flash address
Access Method
Default: 00000000h
31.5.5
FDATA0 (Flash_Data_0_bios)—Offset 10h
Flash data #0
Access Method
Default: 00000000h
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Flash_Address_bios:
SPI_BASE_ADDRESS Type:
PCI Configuration Register (Size: 32
bits)
SPI_BASE_ADDRESS Reference:
SPI_BASE_ADDRESS Reference:
[B:0, D:31, F:0] + 54h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSV
D
0
FL
A
Bit
Range
Default &
Access
Description
31:25
0b
RO
RSVD0:
Reserved
24:0
00000000h
RW
Flash Linear Address (FLA):
The FLA is the starting byte linear address of a SPI Read
or Write cycle or an address within a Block for the Block Erase command. The Flash
Linear Address must fall within a region for which BIOS has access permissions.
Hardware must convert the FLA into a Flash Physical Address (FPA) before running this
cycle on the SPI bus. When operating in Tekoa mode bit 24 is ignored and the
FLA[lb]13:0[rb] is the FPA.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
SPI_BASE_ADDRESS Type:
PCI Configuration Register (Size: 32
bits)
SPI_BASE_ADDRESS Reference:
SPI_BASE_ADDRESS Reference:
[B:0, D:31, F:0] + 54h
Power Well:
EPW
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FD0