Intel E3845 FH8065301487715 Data Sheet
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Product codes
FH8065301487715
PCU – System Management Bus (SMBus)
Intel
®
Atom™ Processor E3800 Product Family
4434
Datasheet
See section 5.5.8 of the System Management Bus (SMBus) Specification, Version 2.0
for the format of the protocol.
for the format of the protocol.
I
2
C Read
This command allows the SoC to perform block reads to certain I
2
C devices, such as
serial EEPROMs. The SMBus Block Read supports the 7-bit addressing mode only.
However, this does not allow access to devices using the I
2
C “Combined Format” that
has data bytes after the address. Typically these data bytes correspond to an offset
(address) within the serial memory chips.
(address) within the serial memory chips.
Note:
This command is supported independent of the setting of the
SMB_Config_HCFG.I2C_EN bit. The I
SMB_Config_HCFG.I2C_EN bit. The I
2
C Read command with the
SMB_Config_HCTL.PECEN bit set produces undefined results. Software must force both
the SMB_Config_HCTL.PECEN and SMB_Mem_AUXC.AAC bit to 0b when running this
command.
the SMB_Config_HCTL.PECEN and SMB_Mem_AUXC.AAC bit to 0b when running this
command.
For I
2
C Read command, the value written into SMB_Mem_TSA.RW needs to be 1b. The
format that is used for the command is shown in below table.
The SoC will continue reading data from the peripheral until the NAK is received.
Table 309. I
2
C Block Read
Bit
Description
1
Start
8:2
Slave Address – 7 bits
9
Write
10
Acknowledge from slave
18:11
Send Data 1 (SMB_Mem_HD1) register
19
Acknowledge from slave
20
Repeated Start
27:21
Slave Address – 7 bits
28
Read
29
Acknowledge from slave
37:30
Data byte 1 from slave – 8 bits
38
Acknowledge
46:39
Data byte 2 from slave – 8 bits
47
Acknowledge
–
Data bytes from slave / Acknowledge
–
Data byte N from slave – 8 bits
–
NOT Acknowledge
–
Stop