Intel N2820 FH8065301616603 Data Sheet

1046

Datasheet

The SPI controller has two operational modes, Non-Descriptor and Descriptor.

If no valid signature is read (either because there is no SPI Flash, or there is an SPI 
Flash with no valid descriptor), the Flash Controller will operate in a Non-Descriptor 
mode.

The following features are not supported in Non-Descriptor mode:

•

Trusted Execution Engine

•

Secure Boot

•

Soft Straps

•

Two SPI Flash device support

•

Hardware sequencing access

•

Descriptor-based security access restrictions

When operating in Non-Descriptor mode, software sequencing must be used to access 
the Flash.

When operating in Non-Descriptor Mode, and a SPI Flash is attached to the processor, it 
is required that the Flash Valid Signature, at offset 10h of the Flash Descriptor, does not 
equal the expected valid value (0FF0A55Ah) or the SPI Controller will wrongly interpret 
that it has a valid signature and that a Flash Descriptor has been implemented.

Descriptor Mode is required to enable many features of the processor:

•

Trusted Execution Engine

•

Secure Boot

•

PCI Express* root port configuration

•

Supports for two SPI components using two separate chip select pins

•

Hardware enforced security restricting master accesses to different regions

•

Soft Strap region providing the ability to use Flash NVM to remove the need for 
pull-up/pull-down resistors for strapping processor features

•

Support for the SPI Fast Read instruction and frequencies greater than 20 MHz

•

Support for Single Input, Dual Output Fast reads

•

Use of standardized Flash instruction set