IBM Intel Xeon E5504 46M1078 User Manual
Product codes
46M1078
Intel® Xeon® Processor 5500 Series Datasheet, Volume 2
87
Register Description
2.14.6
MC_TEST_PAT_BA
Memory Test Pattern Generator Buffer
2.14.7
MC_TEST_PAT_IS
Memory test pattern inversion selection register
2.14.8
MC_TEST_PAT_DCD
Memory test DC drive register
Device:
3
Function: 4
Offset:
B0h
Access as a Dword
Bit
Type
Reset
Value
Description
31:0
RW
0
DATA: 32-bit window into the indirectly-addressed pattern buffer register
space.
Device:
3
Function: 4
Offset:
BCh
Access as a Dword
Bit
Type
Reset
Value
Description
7:0
RW
1
LANE_INVERT: Per-lane selection of normal or inverted pattern
Device:
3
Function: 4
Offset:
C0h
Access as a Dword
Bit
Type
Reset
Value
Description
7:0
RW
0
LANE_DRIVE_DC: Per-lane selection of DC pattern