Intel Xeon® Processor X3430 (8M Cache, 2.40 GHz) BX80605X3430 User Manual
Product codes
BX80605X3430
Processor Uncore Configuration Registers
266
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
4.13.3
MC_THERMAL_DEFEATURE0
MC_THERMAL_DEFEATURE1
Thermal Throttle defeature register.
4.13.4
MC_THERMAL_PARAMS_A0
MC_THERMAL_PARAMS_A1
Parameters used by Open Loop Throughput Throttling (OLTT) and Closed Loop Thermal
Throttling (CLTT).
Throttling (CLTT).
Device:
4, 5
Function: 3
Offset:
50h
Access as a DWord
Bit
Attr
Default
Description
31:1
RO
0
Reserved
0
RW1S
0
THERM_REG_LOCK
When set, no further modification of all thermal throttle registers are
When set, no further modification of all thermal throttle registers are
allowed. This bit must be set to the same value for all channels.
Device:
4, 5
Function: 3
Offset:
60h
Access as a DWord
Bit
Attr
Default
Description
31:24
RW
0
CKE_ASSERT_ENERGY
Energy of having CKE asserted when no command is issued.
Energy of having CKE asserted when no command is issued.
23:16
RW
0
CKE_DEASSERT_ENERGY
Energy of having CKE deasserted when no command is issued.
Energy of having CKE deasserted when no command is issued.
15:8
RW
0
WRCMD_ENERGY
Energy of a write including data transfer.
Energy of a write including data transfer.
7:0
RW
0
RDCMD_ENERGY
Energy of a read including data transfer.
Energy of a read including data transfer.