Motorola DSP56012 User Manual

complete number of words. Remember that for this purpose, the slave device address 
byte does not count as part of the data.

In a transmit session, only the transmit path is enabled and the IOSR-to-HRX FIFO 
transfers are inhibited. When the HTX transfers its valid data word to the IOSR, the 
HTDE status bit is set and the DSP may write a new data word to HTX. If both IOSR 
and HTX are empty, the SHI will suspend the serial clock until new data is written 
into HTX (when the SHI proceeds with the transmit session) or HIDLE is set (the SHI 
reactivates the clock to generate the Stop event and terminate the transmit session).

The SHI operation cannot continue when the DSP is in the Stop state, since no DSP 
clocks are active. While the DSP is in the stop state, the SHI will remain in the 
individual reset state. 

While in the individual Reset state:

• SHI input pins are inhibited.

• Output and bidirectional pins are disabled (high impedance).

• The HCSR status bits and the transmit/receive paths are reset to the same 

state produced by hardware reset or software reset.

• The HCSR and HCKR control bits are not affected.

Motorola recommends that the SHI be disabled before entering the Stop state.