Motorola DSP56012 User Manual
6-16
DSP56012 User’s Manual
MOTOROLA
Serial Audio Interface
Serial Audio Interface Programming Model
6.3.2.13
RCS Receiver Left Data Full (RLDF)—Bit 14
Receiver Left Data Full (RLDF) is a read-only status bit that, together with RRDF (see
below), indicates the status of the enabled receive data registers. RLDF is set when
the left data word (as indicated by WSR pin and the RLRS bit in the RCS) is
transferred to the receive data registers after it was shifted in via the shift register of
the enabled receiver. Since audio data samples are composed of left and right data
words that are read alternately, normal operation of the receivers occurs when either
RLDF or RRDF is set, in a corresponding alternating sequence. A receive overrun
condition is indicated when both RLDF and RRDF are set. RLDF is cleared when the
DSP reads the receive data register of the enabled receiver, provided that
below), indicates the status of the enabled receive data registers. RLDF is set when
the left data word (as indicated by WSR pin and the RLRS bit in the RCS) is
transferred to the receive data registers after it was shifted in via the shift register of
the enabled receiver. Since audio data samples are composed of left and right data
words that are read alternately, normal operation of the receivers occurs when either
RLDF or RRDF is set, in a corresponding alternating sequence. A receive overrun
condition is indicated when both RLDF and RRDF are set. RLDF is cleared when the
DSP reads the receive data register of the enabled receiver, provided that
In case of a receive overrun condition,
RLDF is cleared by first reading the RCS, followed by reading the receive data
register of the enabled receivers. RLDF is also cleared by hardware and software
reset, when the DSP is in the Stop state, and when all receivers are disabled (R0EN
and R1EN cleared). If RXIE is set, an interrupt request will be issued when RLDF is
set. The vector of the interrupt request will depend on the state of the receive overrun
condition. The RLDF bit is cleared during hardware reset and software reset.
register of the enabled receivers. RLDF is also cleared by hardware and software
reset, when the DSP is in the Stop state, and when all receivers are disabled (R0EN
and R1EN cleared). If RXIE is set, an interrupt request will be issued when RLDF is
set. The vector of the interrupt request will depend on the state of the receive overrun
condition. The RLDF bit is cleared during hardware reset and software reset.
6.3.2.14
RCS Receiver Right Data Full (RRDF)—Bit 15
Receiver Right Data Full (RRDF) is a read-only status bit which, in conjunction with
RLDF, indicates the status of the enabled receive data register. RRDF is set when the
right data word (as indicated by the WSR pin and the RLRS bit in RCS) is transferred
to the receive data registers after being shifted in via the shift register of the enabled
receiver. Since audio data samples are composed of left and right data words that are
read alternately, normal operation of the receivers occurs when either RLDF or RRDF
is set, in a corresponding alternating sequence. A receive overrun condition is
indicated when both RLDF and RRDF are set. RRDF is cleared when the DSP reads
the receive data register of the enabled receiver, provided that
RLDF, indicates the status of the enabled receive data register. RRDF is set when the
right data word (as indicated by the WSR pin and the RLRS bit in RCS) is transferred
to the receive data registers after being shifted in via the shift register of the enabled
receiver. Since audio data samples are composed of left and right data words that are
read alternately, normal operation of the receivers occurs when either RLDF or RRDF
is set, in a corresponding alternating sequence. A receive overrun condition is
indicated when both RLDF and RRDF are set. RRDF is cleared when the DSP reads
the receive data register of the enabled receiver, provided that
In case of a receive overrun condition,
RRDF is cleared by first
reading the RCS, followed by reading the receive data register of the enabled
receiver. RRDF is also cleared by hardware reset and software reset, when the DSP is
in the Stop state, and when all receivers are disabled (R0EN and R1EN cleared). If
RXIE is set, an interrupt request will be issued when RRDF is set. The vector of the
interrupt request will depend on the state of the receive overrun condition. The
RRDF bit is cleared during hardware reset and software reset.
receiver. RRDF is also cleared by hardware reset and software reset, when the DSP is
in the Stop state, and when all receivers are disabled (R0EN and R1EN cleared). If
RXIE is set, an interrupt request will be issued when RRDF is set. The vector of the
interrupt request will depend on the state of the receive overrun condition. The
RRDF bit is cleared during hardware reset and software reset.
(RLDF
RRDF
⊕
1).
=
(RLDF
RRDF
•
1),
=
(RLDF
RRDF
⊕
1).
=
(RLDF
RRDF
•
1),
=