Elixir 2GB DDR3-1066MHz SO-DIMM M2N2G64CB8HA5N-BE User Manual

Product codes
M2N2G64CB8HA5N-BE
Page of 19
M2N1G64CBH8A5P / M2N2G64CB8HA5N 
1GB: 128M x 64 / 2GB: 256M x 64  
Unbuffered DDR3 SO-DIMM
                                              
 
REV1.1
 
04/2009 
©  NANYA TECHNOLOGY CORPORATION 
NANYA reserves the right to change products and specifications without notice.
 
 
Functional Block Diagram 
[1GB 
– 
2 Ranks, 64Mx16 DDR3 SDRAMs] 
DQS0

DM0
DQ[8:15]
DQS1
DM1

DQ[0:7]
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D0
Notes : 
1. DQ wiring may differ from that shown however, DQ, DM,   
    DQS, and 
relationships are maintained as shown.
C
K
0
C
K
E
0
O
D
T
0
A
[0
:1
3
]/
B
A
[0
:2
]
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
DQS2

DM2
DQ[24:31]
DQS3
DM3

DQ[16:23]
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D1
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
DQS4

DM4
DQ[40:47]
DQS5
DM5

DQ[32:39]
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D2
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
DQS6

DM6
DQ[56:63]
DQS7
DM7

DQ[48:55]
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D3
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
Vtt
VDD
Temp Sensor
SCL

SCL
SDA

SA0
SA1
A0
A1
A2
SPD
SCL
WP
SCL
SDA
SA0
SA1
A0
A1
A2
Vtt
V
REFDQ
V
REFCA
V
DD
V
DDSPD
Vtt
SPD / TS
D0-D7
D0-D7
V
SS
D0-D7
D0-D7, SPD, Temp sensor
CK0

CK1



D0-D3
D0-D3
Temp Sensor
D0-D7
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D4
C
K
1
C
K
E
1
O
D
T
1
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D5
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D6
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
LDQS
L
UDM

UDQS
DQ[0:7]
LDM
DQ[8:15]
D7
ZQ
240ohm 
+/-1%
C
K
C
K
E
O
D
T
A
[0
:1
3
]/
B
A
[0
:2
]
Vtt
Vtt
VDD
D4-D7
D4-D7