User ManualTable of ContentsTitle Page1Contents3Revision History6Introduction7About This Document7Reference Documents and Information Sources9Overview11Intel® ICH5 AC ’97 Controller Compatibility11Third AC ’97 Component Specification Revision 2.1, Revision 2.2 and Revision 2.3 Compliant Codecs14Dedicated S/P DIF DMA Output Channel1520 Bits Surround PCM Output15Memory Map Status and Control Registers15Second Independent Input DMA Engines16PCI Local Bus Specification, Revision 2.3 Power Management16General Requirements16Intel® ICH5 AC ’97 Controller Theory of Operation17Intel® ICH5 AC ’97 Initialization17System Reset17Codec Topology17BIOS PCI Configuration18Hardware Interrupt Routing19PCI Lock19DMA Engines20Buffer Descriptor List20DMA Initialization21DMA Steady State Operation23Stopping Transfers24FIFO Error Conditions24FIFO Underrun24FIFO Overrun24Channel Arbitration25Data Buffers25Memory Organization of Data25PCM Buffer Restrictions25FIFO Organization26Multiple Codec/Driver Support27Codec Register Shadowing28Codec Access Synchronization29Data Request Synchronization in Audio Split Configurations29Power Management30Codec Topologies30Tertiary Codec Topologies31Power Management Transition Maps31Configuration Number 1: Single Audio Codec (Primary):32Configuration Number 2: Single Modem Codec (Primary):32Configuration Numbers 3 to 6: Dual Function Single or Dual Codec Configurations:33Power Management Topology Considerations34Determining the Presence of Secondary and Tertiary Codecs34Determining the Presence of a Modem Function35Resume Context Recovery35Aggressive Power Management35Primary Audio Requested to D336Secondary Modem Requested to D336Secondary Modem Requested to D036Audio Primary Requested to D037Using a Cold or Warm Reset37Surround Audio Support39Determine Codec’s Audio Channels39Enabling Intel® ICH5 AC ’97 Controller Audio Channels4020-Bits PCM Support43Independent S-P/DIF Output Capability45Support for Double Rate Audio47Independent Input Channels Capability49Link Topology Determination49Intel® ICH5 AC ’97 Modem Driver51Robust Host-Based Generation of a Synchronous Data Stream51Spurious Data Algorithm52Intel® ICH5 AC ’97 Spurious Data Implementation52Size: 479 KBPages: 53Language: EnglishOpen manual