Toshiba Xeon 2.8GHz UPG3843W Manual De Usuario
Los códigos de productos
UPG3843W
Intel® Xeon™ Processor with 512 KB L2 Cache
26
Datasheet
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processors.
2. These voltages are targets only. A variable voltage source should exist on systems in the event that a
2. These voltages are targets only. A variable voltage source should exist on systems in the event that a
different voltage is required. See
for more information.
3. The voltage specification requirements are measured across vias on the platform for the V
CC_SENSE
and
V
SS_SENSE
pins close to the socket with a 100 MHz bandwidth oscilloscope, 1.5 pF maximum probe
capacitance, and 1 milliohm minimum impedance. The maximum length of ground wire on the probe should
be less than 5 mm. Ensure external noise from the system is not coupled in the scope probe.
be less than 5 mm. Ensure external noise from the system is not coupled in the scope probe.
4. The processor should not be subjected to any static V
CC
level that exceeds the V
CC_MAX
associated with any
particular current. Moreover, Vcc should never exceed V
CC_VID
. Failure to adhere to this specification can
shorten the processor lifetime.
5. Maximum current is defined at V
CC_MAX
.
6. The current specified is also for AutoHALT State.
7. The maximum instantaneous current the processor will draw while the thermal control circuit is active as
7. The maximum instantaneous current the processor will draw while the thermal control circuit is active as
indicated by the assertion of PROCHOT#.
8. SM_V
CC
is required for correct operation of the processor VID logic. Refer to
for details.
9. This specification applies to the PLL power pins VCCA and VCCIOPLL. See
for details. This
parameter is based on design characterization and is not tested
10.This specification applies to each GTLREF pin.
11. The loadlines specify voltage limits at the die measured at V
CC_SENSE
and V
SS_SENSE
pins. Voltage
regulation feedback for voltage regulator circuits must be taken from processor V
CC
and V
SS
pins.
12.Adherence to this loadline specification is required to ensure reliable processor operation.
Table 6. Voltage and Current Specifications
Symbol
Parameter
Core
Freq
Min
Typ
Max
VID
Unit
Notes
1
V
CC
V
CC
for Intel Xeon
processor with
512 KB L2 cache
1.80 GHz
2.0
GHz
2.20 GHz
2.40 GHz
2.60 GHz
2.80 GHz
3 GHz
1.361
1.357
1.352
1.347
1.339
1.335
1.356
Refer to
1.465
1.463
1.46
1.458
1.453
1.450
1.467
1.5
1.5
1.5
1.5
1.5
1.5
1.525
V
V
V
V
V
V
V
2, 3, 4, 11, 12
2, 3, 4, 11, 12
2, 3, 4, 11, 12
2, 3, 4, 11, 12
2, 3, 4, 11, 12
2, 3, 4, 11, 12
2, 3, 4, 11, 12
SM_V
CC
SMBus supply
voltage
All freq.
3.135
3.30
3.465
V
8
I
CC
I
CC
for Intel Xeon
processor with
512 KB L2 cache
1.8 GHz
2 GHz
2.20 GHz
2.40 GHz
2.60 GHz
2.80 GHz
3 GHz
42.4
45.3
48.1
51
56.1
59.1
69.1
A
A
A
A
A
A
A
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
I
CC_PLL
I
CC
for PLL power
pins
All freq
60
mA
9
I
CC_SMBus
I
CC
for SMBus power
supply
All freq.
100.0
122.5
mA
8
I
CC_GTLREF
I
CC
for GTLREF pins
All freq
15
µA
10
I
SGnt
/I
SLP
I
CC
Stop-Grant/Sleep
All freq
25
A
6
I
TCC
I
CC
TCC active
All freq
18.6
A
7